DRW05 Search Results

72V8985

Abstract: IDT72V8985
Contextual Info: 3.3 VOLT TIME SLOT INTERCHANGE DIGITAL SWITCH 256 x 256 FEATURES: • • • • • • • • • • IDT72V8985 channel variable or constant throughput delay modes and microprocessor read and write access to individual channels. As an important function of a digital

M6SS

Contextual Info: bbE D INTEGRATE» DEVICE M6SS771 G01E37T Ti|b • IDT CMOS CacheRAM 32k x 9-BIT 288K-BIT BURST COUNTER & SELF-TIMED WRITE IDT71589SA FEATURES: DESCRIPTION: • • • • • • • The IDT71589 is a very high-speed 32k x 9-bit static RAM with full on-chip hardware support of the 80486 CPU interface.

IDT7203

Abstract: IDT7204 IDT7205 IDT7206 IDT7207 IDT7208 IDT720X 7208
Contextual Info: IDT7203 IDT7204 IDT7205 IDT7206 IDT7207 IDT7208 CMOS ASYNCHRONOUS FIFO 2,048 x 9, 4,096 x 9 8,192 x 9, 16,384 x 9 32,768 x 9, 65,536 x 9 FEATURES: • • • • • • • • • • • • • • • • • • First-In/First-Out Dual-Port memory 2,048 x 9 organization IDT7203

IDT728985

Abstract: cs5708 TX6 RX6
Contextual Info: PRELIMINARY IDT728985 Time Slot Interchange Digital Switch 256 x 256 FEATURES: ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ outputs, each of which consists of 32 channels. The IDT728985 provides perchannel variable or constant throughput delay modes and microprocessor

IDT72V90823

Abstract: RX15
Contextual Info: PRELIMINARY IDT72V90823 3.3 VOLT Time Slot Interchange Digital Switch 2,048 x 2,048 FEATURES: • • • • • • • • • • • • • • 2,048 x 2,048 channel non-blocking switching at 8.192 Mb/s Per-channel variable or constant throughput delay

Contextual Info: 2.5V QUADMUX DDR FLOW-CONTROL DEVICE WITH MUX/DEMUX/BROADCAST FUNCTIONS 8,192 x 40 x 4 16,384 x 40 x 4 32,768 x 40 x 4 • FEATURES • • • Choose from among the following memory organizations: IDT72T55248 - 8,192 words, 40-bits/word maximum, 4 Sequential

Contextual Info: ADVANCE INFORMATION 2.5V MULTI-QUEUE FLOW-CONTROL DEVICES 16 QUEUES 18 BIT WIDE CONFIGURATION 589,824 bits, 1,179,648 bits and 2,359,296 bits • • • FEATURES: • • • • • • • • • • • • Choose from among the following memory density options:

Contextual Info: CMOS SyncFIFOTM WITH BUS-MATCHING 2,048 x 36 4,096 x 36 8,192 x 36 • • • FEATURES • • • • • • • Memory storage capacity: IDT723653 – 2,048 x 36 IDT723663 – 4,096 x 36 IDT723673 – 8,192 x 36 Clock frequencies up to 83 MHz 8 ns access time

Contextual Info: ADVANCE INFORMATION IDT72T51333 IDT72T51343 IDT72T51353 2.5V MULTI-QUEUE FLOW-CONTROL DEVICES 8 QUEUES 18 BIT WIDE CONFIGURATION 589,824 bits, 1,179,648 bits and 2,359,296 bits • • • • FEATURES: • • • • • • • • • • • Choose from among the following memory density options:

transistor AeF 11

Abstract: idt72132
Contextual Info: IDT72131 IDT72141 CMOS PARALLEL-TO-SERIAL FIFO 2,048 x 9 and 4,096 x 9 FEATURES: • • • • • • • • • • • DESCRIPTION: 35ns parallel port access time, 45ns cycle time 50MHz serial port shift rate Expandable in depth and width with no external components

diode OF162

Abstract: OF162 IDT72V71643 RX15
Contextual Info: 3.3 VOLT TIME SLOT INTERCHANGE DIGITAL SWITCH WITH RATE MATCHING 4,096 x 4,096 • • FEATURES: • • • • • • • • • • • • • • • Up to 32 serial input and output streams Maximum 4,096 x 4,096 channel non-blocking switching Accepts data streams at 2.048 Mb/s, 4.096 Mb/s, 8.192 Mb/s or

IDT72V223

Abstract: IDT72V233 IDT72V243 IDT72V253 IDT72V263 IDT72V273 IDT72V283 IDT72V293 72V273
Contextual Info: PRELIMINARY 3.3 VOLT HIGH-DENSITY SUPERSYNC II NARROW BUS FIFO IDT72V223, IDT72V233 IDT72V243, IDT72V253 IDT72V263, IDT72V273 IDT72V283, IDT72V293 512 x 18/1,024 x 9, 1,024 x 18/2,048 x 9 2,048 x 18/4,096 x 9, 4,096 x 18/8,192 x 9 8,192 x 18/16,384 x 9, 16,384 x 18/32,768 x 9

IDT72V36100

Abstract: IDT72V36110 IDT72V3640 IDT72V3650 IDT72V3660 IDT72V3670 IDT72V3680 IDT72V3690
Contextual Info: PRELIMINARY IDT72V3640, IDT72V3650 IDT72V3660, IDT72V3670 IDT72V3680, IDT72V3690 3.3V HIGH-DENSITY SUPERSYNC II 36-BIT FIFO 1,024 x 36, 2,048 x 36 4,096 x 36, 8,192 x 36 16,384 x 36, 32,768 x 36 FEATURES: • • • • • • • • Choose among the following memory organizations:Commercial

IDT72V71650

Abstract: TX15
Contextual Info: PRELIMINARY IDT72V71650 3.3 VOLT TIME SLOT INTERCHANGE DIGITAL SWITCH 8,192 x 8,192 FEATURES: DESCRIPTION: • • The IDT72V71650 has a non-blocking switch capacity of 1,024 x 1,024 channels at 2.048Mb/s, 2,048 x 2,048 channels at 4.096Mb/s, and 4,096 x 4,096 channels at 8.192Mb/s and 8,192 x 8,192 channels at 16.384Mb/s. With

Contextual Info: 2.5 VOLT HIGH-SPEED TeraSync FIFO IDT72T1845, IDT72T1855 18-BIT/9-BIT CONFIGURATIONS IDT72T1865, IDT72T1875 2,048 x 18/4,096 x 9, 4,096 x 18/8,192 x 9, 8,192 x 18/16,384 x 9, IDT72T1885, IDT72T1895 16,384 x 18/32,768 x 9, 32,768 x 18/65,536 x 9, 65,536 x 18/131,072 x 9,

Contextual Info: CMOS BUS-MATCHING SyncFIFOTM 256 x 36, 512 x 36, 1,024 x 36 FEATURES: • • • • • • • • • Memory storage capacity: IDT723623 – 256 x 36 IDT723633 – 512 x 36 IDT723643 – 1,024 x 36 Clocked FIFO buffering data from Port A to Port B Clock frequencies up to 83 MHz 8 ns access time

IDT72T3645

Abstract: 72T36125
Contextual Info: 2.5 VOLT HIGH-SPEED TeraSyncTM FIFO 36-BIT CONFIGURATIONS 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36, 32,768 x 36, 65,536 x 36, 131,072 x 36 and 262,144 x 36 FEATURES: • • • • • • • • • • • • • Choose among the following memory organizations:

18320

Contextual Info: IDT72V15160 IDT72V16160 IDT72V17160 IDT72V18160 IDT72V19160 3.3V MULTIMEDIA FIFO 16 BIT V-III, 32 BIT Vx-III FAMILY UP TO 1 Mb DENSITY • • • FEATURES: • • • • Choose among the following memory organizations: Commercial • V-III Vx-III IDT72V15160 - 4,096 x 16

CSR 8510

Abstract: CSR 8510 a10 CSR 8510 v4 80KSBR200 v8 doorbell wireless doorbell 813 doorbell circuit working ADS1118 2322 156 philips doorbell
Contextual Info: Advanced Datasheet 80KSBR200 sRIO SERIAL BUFFER FLOW-CONTROL DEVICE Device Overview ◆ The IDT80KSBR200 is a high speed Serial Buffer SerB that can connect to any Serial RapidIO compliant interface. This device is built to work with any sRIO device and especially with the IDT Pre-Processing

72V36100

Abstract: 72V36110 IDT72V36100 IDT72V36110
Contextual Info: 3.3 VOLT HIGH-DENSITY SUPERSYNC II 36-BIT FIFO IDT72V36100 IDT72V36110 65,536 x36 131,072 x 36 FEATURES: • • • • • • • • • • Choose among the following memory organizations:Commercial IDT72V36100  65,536 x 36 IDT72V36110  131,072 x 36

IDT FIFO

Abstract: AN-60 IDT72215 IDT72225 FIFO Solutions for Increasing Clock Rates and Data Widths
Contextual Info: APPLICATION NOTE AN-60 Designing With The IDT SyncFIFO : The Architecture of The Future By J. Scott Gardner is also limited in depth, due to the number of transistors needed to build each flip-flop storage element. The second-generation FIFO introduced very large buffers based on a

AN-264

Abstract: IDT72V71643 6 to 64 demux
Contextual Info: CREATING LARGE, RATE MATCHING, SWITCH MATRICES USING THE IDT72V71643 APPLICATION NOTE AN-264 INTRODUCTION SWITCH MODES With the rapid increase in bandwidth requirements and port density of communications networks, the situation arises where large switch matrices are

IDT723624

Abstract: IDT723634 IDT723644
Contextual Info: CMOS SyncBiFIFOTM WITH BUS-MATCHING 256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2 FEATURES: • • • • • • • Memory storage capacity: IDT723624 – 256 x 36 x 2 IDT723634 – 512 x 36 x 2 IDT723644 – 1,024 x 36 x 2 Clock frequencies up to 83 MHz 8 ns access time

IDT728980

Contextual Info: TIME SLOT INTERCHANGE DIGITAL SWITCH 256 x 256 FEATURES: • • • • • • • • • IDT728980 outputs, each of which consists of 32 channels 64 Kbit/s per channel to form a multiplexed 2.048 Mb/s stream. 256 x 256 channel non-blocking switch Serial Telecom Bus Compatible (ST-BUS )