DRAM 4 MB Search Results

motorola dram 16 x 16

Abstract: DRAM refresh EC000 MC68322
Contextual Info: SECTION 7 DRAM CONTROLLER The MC68322 supports fast-page mode DRAM devices. Nibble mode and static column DRAM devices are not supported. The MC68322 directly supports up to six banks of DRAM with bank sizes of 256 Kbytes x 16, 1 Mbyte x 16, and 4 Mbytes x 16. All DRAM

Contextual Info: MT4C4M4B1 S 4 MEG X 4 DRAM MICRON I TECHNOLOGY, INC. DRAM 4 MEG x 4 DRAM 2K REFRESH, 5.0V, FAST PAGE MODE, OPTIONAL SELF REFRESH FEATURES • JEDEC- and industry-standard x4 pinout, timing, functions and packages • High-performance CMOS silicon-gate process

xdr rambus

Abstract: xdr elpida
Contextual Info: XDR DRAM 8x16Mx4 Advance Information Overview XDR DRAM CSP x4 Pinout The 512Mb Rambus XDR DRAM device is a CMOS DRAM organized as 128M words by 4 bits. The use of Differential Rambus Signaling Level DRSL technology permits 4000/ 3200/2400 Mb/s transfer rates while using conventional system and board design technologies. XDR DRAM devices are

C1A13

Abstract: LR3000 DRAM controller dram memory 256kx4 lad2 5v LB03 LR3202A LR3203 LR3205 LR32D04
Contextual Info: Chapter 4 LR3203 DRAM Controller This chapter describes the LR3203 DRAM Controller. Chapter 4 is orga­ nized into these sections: • General Description ■ Concepts ■ Configuring the LR3203 ■ Signal Definitions ■ L-Bus Interface ■ DRAM Configurations

IR3203

Abstract: LR3000
Contextual Info: Chapter 4 LR3203 DRAM Controller This chapter describes the LR3203 DRAM Controller. Chapter 4 is orga­ nized into these sections: • General Description ■ Concepts ■ Configuring the LR3203 ■ Signal Definitions ■ L-Bus Interface ■ DRAM Configurations

mb8504e032aa

Contextual Info: To Top / Lineup / Index FUJITSU SEMICONDUCTOR DATA SHEET DS05-11240-2E MEMORY 4 M x 32 BIT HYPER PAGE MODE DRAM MODULE MB8504E032AA-60/-70 4 M × 32 Bit Hyper Page Mode DRAM Module, 5 V, 1-bank • DESCRIPTION The Fujitsu MB8504E032AA is a fully decoded, CMOS dynamic random access memory DRAM module

Contextual Info: V, M in n n N I m t 4C4M4Ai / b i 4 MEG X 4 DRAM 4 MEG x 4 DRAM DRAM FEATURES • Industry-standard x4 pinout, timing, functions and packages • High-performance CMOS silicon-gate process • Single power supply: +5V *10% • Low power, 3mW standby; 200mW active, typical Al

Contextual Info: HB56UW472EJN Series, HB56UW464EJN Series HB56UW472EJN 32 MB Unbuffered EDO DRAM DIMM 4-Mword X 72-bit, 4 k Refresh, 1-Bank Module 18 pcs of 4 M X 4 Components HB56UW464EJN 32 MB Unbuffered EDO DRAM DIMM 4-Mword X 64-bit, 4 k Refresh, 1-Bank Module (16 pcs of 4 M X 4 Components)

Hitachi DSA00164

Abstract: Nippon capacitors
Contextual Info: HB56UW472EJN Series, HB56UW464EJN Series HB56UW472EJN 32 MB Unbuffered EDO DRAM DIMM 4-Mword x 72-bit, 4 k Refresh, 1-Bank Module 18 pcs of 4 M × 4 Components HB56UW464EJN 32 MB Unbuffered EDO DRAM DIMM 4-Mword × 64-bit, 4 k Refresh, 1-Bank Module (16 pcs of 4 M × 4 Components)

Contextual Info: HB56UW472EJN Series, HB56UW464EJN Series HB56UW472EJN 32 MB Unbuffered EDO DRAM DIMM 4-Mword X 72-bit, 4 k Refresh, 1-Bank Module 18 pcs of 4 M X 4 Components HB56UW464EJN 32 MB Unbuffered EDO DRAM DIMM 4-Mword X 64-bit, 4 k Refresh, 1-Bank Module (16 pcs of 4 M X 4 Components)

dram controller

Abstract: CRTC 4M DRAM EDO
Contextual Info: DRAM Controller 1/4 64-bit DRAM Controller Uses Unified Memory Architecture UMA The System memory and Graphics Frame Buffer use the same memory space and memory hardware DRAM Controller consists of 2 domains: Host Clock domain CPU & PCI bridge DRAM refresh cycles

1170 T

Abstract: 24C02 HB56UW464EJN HB56UW472EJN HB56UW472EJN-5 HB56UW472EJN-5L HB56UW472EJN-6 HB56UW472EJN-6L HB56UW472EJN-7 HM51W16405
Contextual Info: HB56UW472EJN Series, HB56UW464EJN Series HB56UW472EJN 32 MB Unbuffered EDO DRAM DIMM 4-Mword x 72-bit, 4 k Refresh, 1-Bank Module 18 pcs of 4 M × 4 Components HB56UW464EJN 32 MB Unbuffered EDO DRAM DIMM 4-Mword × 64-bit, 4 k Refresh, 1-Bank Module (16 pcs of 4 M × 4 Components)

Contextual Info: IS42S46400A 4-bank x 16,777,216 - word x 4-bit IS42S83200A (4-bank x 8,388,608 - word x 8-bit) IS42S16160A (4-bank x 4,194,304 - word x 16-bit) ISSI 256 Mb Synchronous DRAM AUGUST 2004 DESCRIPTION IS42S46400A is organized as 4-bank x 16,777,216-word x 4-bit Synchronous DRAM with LVTTL interface and

Contextual Info: IS42S46400A 4-bank x 16,777,216 - word x 4-bit IS42S83200A (4-bank x 8,388,608 - word x 8-bit) IS42S16160A (4-bank x 4,194,304 - word x 16-bit) ISSI 256 Mb Synchronous DRAM AUGUST 2004 DESCRIPTION IS42S46400A is organized as 4-bank x 16,777,216-word x 4-bit Synchronous DRAM with LVTTL interface and

Contextual Info: IS42S46400A 4-bank x 16,777,216 - word x 4-bit IS42S83200A (4-bank x 8,388,608 - word x 8-bit) IS42S16160A (4-bank x 4,194,304 - word x 16-bit) ISSI 256 Mb Synchronous DRAM AUGUST 2004 DESCRIPTION IS42S46400A is organized as 4-bank x 16,777,216-word x 4-bit Synchronous DRAM with LVTTL interface and

HB56D436

Abstract: HM514100
Contextual Info: HB56D436 Series 4,194,304-word x 36-bit High Density Dynamic RAM Module Description The HB56D436 is a 4 M × 36 dynamic RAM module, mounted 8 pieces of 16-Mbit DRAM HM5117400BS sealed in SOJ package and 4 pieces of 4-Mbit DRAM (HM514100CS) sealed in SOJ

Contextual Info: November 1995 Edition 1.0 FUJITSU PRODUCT PROFILE SHEET M B 8 5 3 4 4 C -6 0 /-7 0 CMOS 2M X 32 Hyper Page Mode DRAM Module CMO S 2,097,152 x 32 Bit Hyper Page M ode DRAM Module The Fujitsu MB85344C is a fully decoded, CMOS dynamic random access memory DRAM module consisting of sixteen MB814405C devices. The MB85344C is

MSM514262

Abstract: MSM514262-10 MSM514262-70 MSM514262-80 ZIP28-P-400 I04/TEST1
Contextual Info: O K I Semiconductor MSM5 14262 262,144-Word x 4-Bit Multiport DRAM DESCRIPTION The MSM514262 is a 1-Mbit CMOS multiport DRAM composed of a 262,144-word by 4-bits dynamic RAM and a 512-words by 4-bits SAM. Its RAM and SAM operate independently and asynchronously.

SAM256

Contextual Info: O K I Semiconductor MSM5 14262 262,144-Word x 4-Bit Multiport DRAM DESCRIPTION The MSM514262 is an 1-Mbit CMOS multiport DRAM composed of a 262,144-word by 4-bit dynamic RAM and a 512-word by 4-bit SAM. Its RAM and SAM operate independently and asynchronously.

SBS IN CIRCUIT

Abstract: Nippon capacitors
Contextual Info: HB56A832BS/SBS, HB56A432BR/SBR Series HB56A832BS/SBS 32 MB Unbuffered FP DRAM SIMM 8-Mword X 32-bit, 2 k Refresh, 2-Bank Module 16 pcs of 4 M X 4 Components HB56A432BR/SBR 16 MB Unbuffered FP DRAM SIMM 4-Mword X 32-bit, 2 k Refresh, 1-Bank Module (8 pcs of 4 M X 4 Components)

Contextual Info: HB56U832 Series, HB56U432 Series HB56U832B/SB 32 MB EDO DRAM SIMM 8-Mword X 32-bit, 2 k Refresh, 2-Bank Module 16 pcs of 4 M X 4 Components HB56U432B/SB 16 MB EDO DRAM SIMM 4-Mword X 32 bit, 2 k Refresh, 1-Bank Module (8 pcs of 4 M X 4 Components) HITACHI

Nippon capacitors

Contextual Info: HB56U832 Series, HB56U432 Series HB56U832B/SB 32 MB EDO DRAM SIMM 8-Mword X 32-bit, 2 k Refresh, 2-Bank Module 16 pcs of 4 M X 4 Components HB56U432B/SB 16 MB EDO DRAM SIMM 4-Mword X 32 bit, 2 k Refresh, 1-Bank Module (8 pcs of 4 M X 4 Components) HITACHI

Nippon capacitors

Abstract: HB56A832BS Series
Contextual Info: HB56A832BS/SBS, HB56A432BR/SBR Series HB56A832BS/SBS 32 MB Unbuffered FP DRAM SIMM 8-Mword x 32-bit, 2 k Refresh, 2-Bank Module 16 pcs of 4 M × 4 Components HB56A432BR/SBR 16 MB Unbuffered FP DRAM SIMM 4-Mword × 32-bit, 2 k Refresh, 1-Bank Module (8 pcs of 4 M × 4 Components)

*81c4256a

Abstract: wl4p d20011
Contextual Info: June 1991 Edition 3.0 FUJITSU DATA SHEET MB81C4256A-70L/-80L/-10L CMOS 256K x 4 BIT FAST PAGE MODE LOW POWER DRAM CMOS 262,144 x 4 Bit Fast Page Mode Low Power DRAM The Fujitsu MB81C4256A is a CMOS, fully decoded dynamic RAM organized as 262,144 words x 4