DPS 298 CP 2 Search Results

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Contextual Info: 'J? à\4707B/4707BX y / Jr DATA ACCESS REGISTER F A IR C H IL D C M O S M A C R O L O G IC D E S C R IP T IO N — The 4 7 0 7 B /4 7 0 7 B X Data Access Register D A R is designed to perform the m em ory address fu n ctio n fo r R A M resident stack applications. T h e D A R can

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Contextual Info: D at a S h eet , D S 2, Feb. 20 0 1 C165UTAH Embedded C166 with USB, IOM-2 and HDLC Support Version 1.3 Wired Communications N e v e r s t o p t h i n k i n g . Edition 2001-02-23 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 München, Germany

20542

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Contextual Info: Dat a She et , DS 1, Se p. 20 00 SEROCCO-D 2 Channel Serial Optimized Communication Controller with DMA PEB 20542 Version 1.2 PEF 20542 Version 1.2 Datacom N e v e r s t o p t h i n k i n g . Edition 2000-09-14 Published by Infineon Technologies AG, St.-Martin-Strasse 53,

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Contextual Info: @ MOTOROLA MC68360 QUad Integrated Communications Controller User’s Manual Motorola reserves the right to make changes without further notice to any products herein to improve reliability, function or design. Motorola does not assume any liability arising out of the application or use of any product described

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Contextual Info: MOTOROLA MC68360 QUad Integrated Communications Controller User’s Manual Motorola reserves the right to make changes without further notice to any products herein to improve reliability, function or design. Motorola does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of

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Contextual Info: Freescale Semiconductor, Inc. Freescale Semiconductor, Inc. MC68360 QUad Integrated Communications Controller User’s Manual For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. Freescale Semiconductor, Inc. ii

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Contextual Info: D at a S h e e t , D S 1 , M ay 2 00 0 DSCC4 DMA Supported Serial Communication Controller with 4 Channels PEB 20534 Version 2.1 PEF 20534 Version 2.1 Datacom N e v e r s t o p t h i n k i n g . PEB 20534 PEF 20534 Revision History: Current Version: 2000-05-30

D108051

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Contextual Info: LPC47N350 Legacy-Free Keyboard/Embedded Controller with SPI and LPC Docking Interface Datasheet Product Features • ■ ■ ■ ■ ■ ■ ■ ■ 3.3V Operation with 5V Tolerant Buffers ACPI 2.0 PC2001 Compliant LPC Interface with Clock Run Support — Decode I/O, Memory, and FWH cycles

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Abstract: BOSCH 0 281 002 709 MC9S12ZVM
Contextual Info: MC9S12ZVM-Family Reference Manual HCS12 Microcontrollers Rev. 1.3 20 JAN 2014 MC9S12ZVMRMV1 freescale.com To provide the most up-to-date information, the document revision on the Internet is the most current. A printed copy may be an earlier revision. To verify you have the latest information available, refer to :

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Contextual Info: MPC8360E PowerQUICC II Pro Integrated Communications Processor Family Reference Manual MPC8360ERM Rev. 2 05/2007 How to Reach Us: Home Page: www.freescale.com email: support@freescale.com USA/Europe or Locations Not Listed: Freescale Semiconductor Technical Information Center, CH370

PDC 7ROM

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Contextual Info: Features • Incorporates the ARM920T ARM Thumb® Processor – – – – • • • • • • • • • • • 200 MIPS at 180 MHz, Memory Management Unit 16-KByte Data Cache, 16-KByte Instruction Cache, Write Buffer In-circuit Emulator including Debug Communication Channel

IT8512E

Abstract: IT8512 IT8301 ITE IT8512 CIR
Contextual Info: IT8512E/F Embedded Controller Preliminary Specification 0.4.1 ITE TECH. INC. Specification subject to Change without notice, AS IS and for reference only. For purchasing, please contact sales representatives. Copyright 2006 ITE Tech. Inc. This is Preliminary document release. All specifications are subject to change without notice.

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Contextual Info: Features • Incorporates the ARM920T ARM Thumb® Processor • • • • • • • • • • • • • • • • – 200 MIPS at 180 MHz, Memory Management Unit – 16-KByte Data Cache, 16-KByte Instruction Cache, Write Buffer – In-circuit Emulator including Debug Communication Channel

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Contextual Info: MPC8349E PowerQUICC II Pro Integrated Host Processor Family Reference Manual Supports MPC8349E MPC8347E MPC8343E MPC8349E Rev. 1 8/2005 How to Reach Us: Home Page: www.freescale.com email: support@freescale.com USA/Europe or Locations Not Listed: Freescale Semiconductor

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Contextual Info: Intel I/O Controller Hub 9 ICH9 Family Datasheet – For the Intel® 82801IB ICH9, 82801IR ICH9R, 82801IH ICH9DH, 82801IO ICH9DO, 82801IBM ICH9M and 82801IEM ICH9M-E, and ICH9M-SFF ICH9-I/O Controller Hubs August 2008 Document Number: 316972-004 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR

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Contextual Info: An addendum for this document is available. See Document ID#: IMX25RMAD. i.MX25 Multimedia Applications Processor Reference Manual Supports i.MX251 MCIMX251 i.MX253 (MCIMX253) i.MX255 (MCIMX255) i.MX257 (MCIMX257) i.MX258 (MCIMX258) IMX25RM Rev. 1 06/2009

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Contextual Info: MCIMX31 and MCIMX31L Multimedia Applications Processors Reference Manual MCIMX31RM Rev. 1 2/2006 How to Reach Us: USA/Europe/Locations Not Listed: Freescale Semiconductor Literature Distribution Center P.O. Box 5405 Denver, Colorado 80217 1-800-521-6274 or 480-768-2130

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Contextual Info: i.MX 6Solo/6DualLite Applications Processor Reference Manual Document Number: IMX6SDLRM Rev. 1, 04/2013 i.MX 6Solo/6DualLite Applications Processor Reference Manual, Rev. 1, 04/2013 2 Freescale Semiconductor, Inc. Contents Section number Title Page Chapter 1

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Contextual Info: Intel Server Platforms SR4850HW4 and SR4850HW4/M Product Guide Order Number: C92647-005 A guide for Technically Qualified Assemblers of Intel® Identified Subassemblies/Products. Disclaimer Information in this document is provided in connection with Intel® products. No license, express or implied, by estoppel or

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Abstract: INTELDX4 write-through YSS 928
Contextual Info: INTEL486 PROCESSOR FAMILY • lntelDX4TM P ro c e s s o r — Up to 100-MHz Operation -Speed-M ultiplying Technology — 32-Bit Architecture — 16K-Byte On-Chip Cache — Integrated Floating-Point Unit — 3.3V Core Operation with 5V Tolerant I/O Buffers

Contextual Info: Intel Ethernet Connection I217 Datasheet v2.3 Product Features  General — 10 BASE-T IEEE 802.3 specification conformance — 100 BASE-TX IEEE 802.3 specification conformance — 1000 BASE-T IEEE 802.3 specification conformance — Energy Efficient Ethernet EEE IEEE