DMAC II Search Results

DPRAM

Abstract: verilog code for 16 kb ram block code error management, verilog APEX20K APEX20KC APEX20KE CRC-32 802.3 CRC32 crc 16 verilog STATIC RAM vhdl
Contextual Info: DMAC Media Access Controller ver 2.07 OVERVIEW The DMAC is hardware implementation of media access control protocol defined by the IEEE standard. DMAC in cooperation with external PHY device enables network functionality in design. It is capable of transmitting

0E000000

Abstract: AR-S1 26
Contextual Info: APPLICATION NOTE H8SX Family DMAC Offset Transfer Preliminary Summary Image data is rotated 90 degrees to the left using DMAC offset transfer. Contents 1. Specifications . 2

hd68000

Contextual Info: -U172.1 HD63450, HD63450Y, HD63450P HD63450PS, HD63450CP Ci CMOS Direct Memory Access Controller SEPTEMBER, 1989 0 H IT A C H I The HD63450 is a CMOS Direct Memory Access Controller DMAC . It is upwardly compatible with the NMOS DMAC HD68450. In addition to the NMOS DMAC HD68450 features, the

DTC Data Technology

Contextual Info: APPLICATION NOTE H8S/2200 Series Simultaneous Startup of DTC, DMAC, and CPU Introduction Starts up DTC, DMAC, and CPU each time a compare match occurs. DTC transfers data from the ROM to the I/O port and outputs pulses. The DMAC transfers data stored in RAM1 to RAM2. The CPU monitors the state of the port and

sfr32c83

Contextual Info: APPLICATION NOTE M32C/80 Series Using DMAC II Single Transfer 1. Abstract This application note describes how to use DMAC II in single transfer mode. 2. Introduction The explanation of this issue is applied to the following condition: Applicable MCU: M32C/80 Series

cpu in diagrams

Contextual Info: APPLICATION NOTE H8S Family Simultaneous Startup of DTC, DMAC, and CPU Introduction Starts up DTC, DMAC, and CPU each time a compare match occurs. DTC transfers data from the ROM to the I/O port and outputs pulses. The DMAC transfers data stored in RAM1 to RAM2. The CPU monitors the state of the port and

100C

Abstract: SH7670 DARN
Contextual Info: APPLICATION NOTE SH7670 Group Using the DMAC to Transfer Data between Memory Areas Introduction This application note provides an example of transferring data between memory areas with the direct memory access controller DMAC of the SH7670. Target Device

Contextual Info: APPLICATION NOTE H8SX Family Ring Buffer Processing by DMAC Extended Repeat Area Function Preliminary Summary Ring buffer processing is performed by means of the DMAC extended repeat area function. Contents 1. Specifications . 2

h8sx

Contextual Info: APPLICATION NOTE H8SX Family Using the DMAC to Drive Continuous SCI Transmission in Asynchronous Mode Introduction Asynchronous transfer is used to transmit 128 bytes of data. Using the DMAC to handle the transfer transmission of data enables continuous transmission with no CPU intervention.

UART0

Abstract: f1SIO
Contextual Info: APPLICATION NOTE M16C/62P Group Procedure for Successive Serial I/O Transmission/Reception Using the DMAC 1. Abstract This application note presents the procedure for successive serial I/O transmission/reception using the DMAC and an example on how to use it.

FFA000

Contextual Info: APPLICATION NOTE H8SX Family Ring Buffer Processing Using Extended Repeat Area Function of the DMAC Introduction The direct memory access controller DMAC performs ring buffer processing using the extended repeat area function. Target Device H8SX/1653 Contents

0C00

Abstract: 100C
Contextual Info: APPLICATION NOTE SH7211 Group Data Transfer between Memory Areas with DMAC Introduction This application note provides an example of transferring data between memory areas with the direct memory access controller DMAC of the SH7211. Target Device SH7211

Contextual Info: APPLICATION NOTE M16C/26 Using the DMAC with a Forward Destination 1.0 Abstract The following article introduces and shows an example of how to use the DMAC function of the M16C/26 with a fixed source address and forward counting destination address. 2.0 Introduction

NC30

Contextual Info: APPLICATION NOTE M16C/62 Using the M16C/62 DMAC in Forward Destination Mode 1.0 Abstract The following article introduces and shows an example of how to use the DMAC function of the M16C/62 with a fixed source address and forward counting destination address.

Contextual Info: APPLICATION NOTE H8S Family A/D Conversion by Timer Trigger Introduction The A/D converter and DMAC by a conversion start trigger is started from the TPU, A/D conversion of the audio signals is performed and the signals to the RAM are transferred through the DMAC.

SH7263

Abstract: 101C SH7203 iodefine CBR4800
Contextual Info: APPLICATION NOTE SH7263/SH7203 Group Data Transfer to On-chip Peripheral Modules with DMAC Introduction This application note provides an example of transferring data to on-chip peripheral modules with the direct memory access controller DMAC of the SH7263/SH7203.

101C

Abstract: 9600BPS
Contextual Info: APPLICATION NOTE SH7211 Group Data Transfer to On-chip Peripheral Modules with DMAC Introduction This application note provides an example of transferring data to on-chip peripheral modules with the direct memory access controller DMAC of the SH7211. Target Device

PFC 32U

Abstract: 101C SH7670 115200 UART
Contextual Info: APPLICATION NOTE SH7670 Group Using the DMAC to Transfer Data to On-chip Peripheral Modules Introduction This application note provides an example of transferring data to on-chip peripheral modules with the direct memory access controller DMAC of the SH7670.

FFFE0010

Abstract: FFFE0018 FFFE1000 FFFE1004 FFFE1008 FFFE100C H1-303
Contextual Info: APPLICATION NOTE SH7211 Group Data Transfer between On-chip RAM Areas with DMAC Burst Mode Introduction This application note describes the operation of the DMAC, and is intended for reference to help in the design of user software. Target Device SH7211

0C00

Abstract: 100C SH7286
Contextual Info: APPLICATION NOTE SH7280 Group Data Transfer between Memory Areas with DMAC Introduction This application note provides an example of transferring data between memory areas with the direct memory access controller DMAC of the SH7285. Target Device SH7285

WE32104

Abstract: we32100 DMAC
Contextual Info: WE 32104 DMA Controller Description The WE 32104 DMA Controller DMAC is a memory-mapped peripheral device that performs memory-to-memory, memory fill, memory-to-peripheral, and peripheral-tomemory data transfers quickly and efficiently. The DMAC contains specialized hardware that

h8sx

Contextual Info: APPLICATION NOTE H8SX Family Using the DMAC to Drive Continuous SCI Reception in Asynchronous Mode Introduction Asynchronous transfer is used to receive 128 bytes of data. Using the DMAC to handle the transfer reception of data enables continuous reception with no CPU intervention.

MD10

Abstract: MD11
Contextual Info: APPLICATION NOTE M32C/85 Group Procedure for Successive Serial I/O Transmission/Reception Using the DMAC 1. Abstract This application note presents the procedure for successive serial I/O transmission/reception using the DMAC and an example on how to use it.

Contextual Info: APPLICATION NOTE M16C/Tiny Series Operation of DMAC One-Shot Transfer Mode 1. Abstract In one-shot transfer mode of DMAC, choose functions from those listed in Table 1. Operations of the checked items are described below. Table 1. Choosed Functions Item