DMA CONTROLLER 8237 Search Results

VL82C37A-08PC

Abstract: VL82C37A DR 6236 Pin Details of bus controller IC 8282 vl82c3
Contextual Info: V L S I T e c h n o lo g y , in c . VL82C37A CMOS DIRECT MEMORY ACCESS DMA CONTROLLER FEATURES DESCRIPTION • Low-power CMOS version of popular 8237A DMA controller The VL82C37A Direct Memory Access (DMA) Controller serves as a peripheral interface circuit for microprocessor

80C88

Abstract: CA82C37A MD500 S21-S22
Contextual Info: CA82C37A CRL PROGRAMMABLE DMA CONTROLLER Pin and functional compatibility with the industry standard 8237/8237A The CA82C37A is a high performance, programmable Direct Memory Access DMA controller offering pin-forpin functional compatibility with the industry standard

Intel 8237A

Abstract: intel 8237A DMA Controller 231369 8237A-5
Contextual Info: Intel 8237A HIGH PERFORMANCE PROGRAMMABLE DMA CONTROLLER 8237A-5 • Enable/Disable Control of Individual DMA Requests ■ Four Independent DMA Channels ■ Independent Autoinitialization of All Channels ■ Memory-to-Memory Transfers ■ Memory Block Initialization

5962R9582101QQC

Abstract: 5962R9582101QXC 5962R9582101VQC 5962R9582101VXC 82C37A HS1-82C37ARH-8 HS-80C85RH HS-80C86RH HS-82C37ARH ENCODER IC
Contextual Info: HS-82C37ARH TM Data Sheet Radiation Hardened CMOS High Performance Programmable DMA Controller The Intersil HS-82C37ARH is an enhanced, radiation hardened CMOS version of the industry standard 8237A Direct Memory Access DMA controller, fabricated using the

Contextual Info: CA82C37A C f ìi PROGRAMMABLE DMA CONTROLLER Pin and functional compatibility with the industry standard 8237/8237A The CA82C37A is a high performance, programmable Direct Memory Access DMA controller offering pin-forpin functional compatibility with the industry standard

ks82c37

Abstract: samsung 540 Samsung 546 ks82c37a-5
Contextual Info: KS82C37A PROGRAMMABLE DMA CONTROLLER FEATURES/BENEFITS DESCRIPTION • Pin and functional compatibility with the industry standard 8237/8237A The KS82C37A is a high performance, programmable Direct Memory Access DMA controller offering pinfor-pin functional compatibility with the industry standard

TRANSISTOR A30

Abstract: A30 TRANSISTOR Intel 8237A
Contextual Info: GFI2370A GFI2370A GFI2370A DMA CONTROLLER GENERAL DESCRIPTION : THE GFI2370A IS COMPATIBLE IN FUNCTIONALITY WITH THE INTEL 8237A 4-CHANNEL PROGRAMMABLE DMA CONTROLLER. THE PERFORMANCE IS MUCH IMPROVED OVER THE STANDARD PART. FOR A DETAILED FUNCTIONAL DESCRIPTION, SEE THE INTEL DATA BOOK.

Contextual Info: 8237 CFI2370G CFI2370G GENERAL DESCRIPTION: DMA CONTROLLER CFI2370G is compatible in functionality with the INTEL 8237A 4-channel programmable DMA controller. The performance is much improved over that of the standard part. For detailed functional description, see the INTEL data book.

74ls612

Abstract: 8237 DMA Controller Block Diagram of 8237 pin diagram 8259 memory mapper atmel 932 8259 8259 pin diagram 8254 TIMER pin diagram of 8237
Contextual Info: AT40206 Features • • • • • • • • • Fully Compatible with PC/AT Architecture Fully Compatible with 8237 DMA Controller, 8259 Interrupt Controller, 8254 Timer/Counter, and 146818 Real-Time Clock Provides 7 DMA Channels, 13 Interrupt Request Channels,

Intel 8237 dma controller block diagram

Abstract: C8237 3S50-5 Intel 8237 16 bit register in verilog BIT20
Contextual Info: Four, independent DMA channels Enable/Disable control of individual DMA requests C8237 Independent auto-initialization of all channels Programmable DMA Controller Xilinx Core Memory-to-Memory transfers Memory block initialization Address increment of decrement

C8237

Abstract: Block Diagram of 8237
Contextual Info: Enable/Disable control of individual DMA requests Four, independent DMA channels C8237 Independent auto-initialization of all channels Programmable DMA Controller Altera Core Memory-to-Memory transfers Memory block initialization Address increment of decrement

intel 8237A DMA Controller

Abstract: 231369 8237A-5 8237A transfer modes order 231369
Contextual Info: inU. 8237A HIGH PERFORMANCE PROGRAMMABLE DMA CONTROLLER 8237A-5 • ■ ■ ■ ■ ■ ■ ■ Enable/Disable Control of Individual DMA Requests Four Independent DMA Channels Independent Autoinitialization of All Channels Memory-to-Memory Transfers Memory Block Initialization

80C286

Abstract: 80C86 80C88 82C37A 82C82 CP82C37A-5 CS82C37A-5 IP82C37A-5 IS82C37A-5 NSC800
Contextual Info: 82C37A CMOS High Performance Programmable DMA Controller March 1997 Features Description • Compatible with the NMOS 8237A The 82C37A is an enhanced version of the industry standard 8237A Direct Memory Access DMA controller, fabricated using Intersil’s advanced 2 micron CMOS process. Pin

Contextual Info: AT40206 Features • • • • • • • • • Fully Compatible with PC/AT Architecture Fully Compatible with 8237 DMA Controller, 8259 Interrupt Controller, 8254 Timer/Counter, and 146818 Real-Time Clock Provides 7 DMA Channels, 13 Interrupt Request Channels,

DRE01

Abstract: 8237A-5 intel 8237A DMA Controller
Contextual Info: intJ 8237A HIGH PERFORMANCE PROGRAMMABLE DMA CONTROLLER 8237A-5 • Enable/Disable Control of Individual DMA Requests ■ Directly Expandable to Any Number of Channels ■ Four Independent DMA Channels ■ End of Process Input for Terminating Transfers ■ Independent Autoinitialization of All

design of dma controller using vhdl

Abstract: 8237 DMA Controller Intel 8237 Direct Memory Access Controller Intel 8237 dma controller intel 8237A DMA Controller microprocessors interface 8237 Intel 8237 dma controller block diagram INTEL 8237 DMA Controller 8237 8237 DMA
Contextual Info: ispLever CORE TM Multi-Channel DMA Controller User’s Guide August 2003 ipug11_01 Lattice Semiconductor Multi-Channel DMA Controller User’s Guide Introduction This document contains technical information about the Lattice Multi-Channel Direct Memory Access MCDMA

Intel 8237

Abstract: vhdl code for 4 channel dma controller Intel 8237 dma controller block diagram C8237 vhdl code for flip-flop Intel 8237 dma 8237 DMA Controller vhdl code dma controller EP1K30 EP20K60E
Contextual Info: C8237 Programmable DMA Controller Overview The C8237 programmable DMA controller megafunction is a peripheral interface circuit for microprocessor systems. The megafunction is designed to be used in conjunction with an external 8-bit address latch. It contains four

PicoPower

Abstract: N82077 DS1287 8038 ic pin diagram for fm DP8477 IRDA2 PC87570 MC146818 PC87550 ETS-910
Contextual Info: N ADVANCE INFORMATION January 1997 PC87560 — PCI System I/O 1.0 General Description • Legacy 8237 DMA Controller - Seven 8237 compatible channels supported - Distributed DMA Master and Slave modes - 2 Double-Word Buffers for PCI Bus transfers - DMA Channel routing for Plug and Play

82C37A

Abstract: 82C82 CP82C37A-5 CS82C37A-5 IP82C37A-5 IS82C37A-5 NSC800 80C286 80C86 80C88
Contextual Info: 82C37A TM CMOS High Performance Programmable DMA Controller March 1997 Features Description • Compatible with the NMOS 8237A The 82C37A is an enhanced version of the industry standard 8237A Direct Memory Access DMA controller, fabricated using Intersil’s advanced 2 micron CMOS process. Pin

Contextual Info: 82C37A Semiconductor CMOS High Performance Programmable DMA Controller March 1997 Features Description • Com patible with the NMOS 8237A The 82C37A is an enhanced version of the industry standard 8237A Direct Memory Access DMA controller, fabricated using Harris’ advanced 2 micron CMOS process. Pin

82C37A

Abstract: 82C37A DMA Controller marking db2 5962-9054301MXA 80286 microprocessor features 80286 microprocessor pin out diagram 8088 microprocessor control data bus for 80286 logical block diagram of 80286 microprocessor 80286 Number of registers size
Contextual Info: 82C37A Data Sheet March 20, 2006 CMOS High Performance Programmable DMA Controller FN2967.2 Features • Compatible with the NMOS 8237A The 82C37A is an enhanced version of the industry standard 8237A Direct Memory Access DMA controller, fabricated using Intersil’s advanced 2 micron CMOS process. Pin

Intel 8237A

Abstract: intel 8237A DMA Controller 82C37A A8237
Contextual Info: a8237 Programmable DMA Controller April 1999, ver. 1.01 Features Data Sheet • ■ ■ ■ ■ ■ ■ General Description a8237 MegaCore function implementing a programmable direct memory access DMA controller Optimized for FLEX® architecture Provides four independent channels

Intel 8237A

Abstract: interfacing of 8237 with 8086 DMA interface 8237 WITH 8088 8237 interface with 8086 Peripheral block diagram intel 8282 latch interfacing of 8237 with 8085 AP-67 8086 Intel 8237 8085AH 8085AH-2
Contextual Info: in te i 8237A HIGH PERFORMANCE PROGRAMMABLE DMA CONTROLLER 8237A, 8237A-4, 8237A-5 Enable/D isable Control of Individual DMA Requests Directly Expandable to Any Num ber of Channels Four Independent DMA Channels End o f Process Input fo r Term inating Transfers

Contextual Info: ß fö H O M O K lM lf intei M82380 HIGH PERFORMANCE 32-BIT DMA CONTROLLER WITH INTEGRATED SYSTEM SUPPORT PERIPHERALS High Performance 32-Bit DMA Controller — 40 MBytes/sec Maximum Data Transfer Rate at 20 MHz — 8 Independently Programmable Channels DRAM Refresh Controller