DM74LS366A Search Results

DM54LS366AE

Abstract: DM54LS366AJ DM54LS366AW DM74LS366A DM74LS366AM DM74LS366AN E20A J16A M16A N16E
Contextual Info: S E M IC O N D U C T O R tm DM74LS366A Hex 3-STATE Inverting Buffer sistors are turned off presenting a high-im pedance state to the bus line. Thus the output will act neither as a significant load nor as a driver. To m inim ize th e possibility that tw o o ut­

74LS366AN

Abstract: 74LS36
Contextual Info: I R C H I L D S E M I C O N D U C T O R TM DM74LS366A Hex 3-STATE Inverting Buffer This device contains six independent gates each o f which perform s an inverting buffer function. The outputs have the 3-STATE feature. When enabled, the outputs exhibit the low

DM54LS366A

Abstract: DM54LS366AJ DM74LS366AM DM74LS366AN J16A M16A N16A
Contextual Info: DM54LS366A/DM74LS366A National Semiconductor Corporation DM54LS366A/DM74LS366A Hex TRI-STATE« Inverting Buffers General Description This device contains six independent gates each of which performs an inverting buffer function. The outputs have the TRI-STATE feature. When enabled, the outputs exhibit the

Contextual Info: S E M IC O N D U C T O R tm DM74LS366A Hex 3-STATE Inverting Buffer sistors are turned off presenting a high-im pedance state to the bus line. Thus the output will act neither as a significant load nor as a driver. To m inim ize th e possibility that tw o o ut­

DM54LS366AE

Abstract: DM54LS366AJ DM54LS366AW DM74LS366A DM74LS366AM DM74LS366AN E20A J16A M16A
Contextual Info: DM74LS366A Hex 3-STATE Inverting Buffer General Description This device contains six independent gates each of which performs an inverting buffer function. The outputs have the 3-STATE feature. When enabled, the outputs exhibit the low impedance characteristics of a standard LS output with additional drive capability to permit the driving of bus lines without external resistors. When disabled, both the output tran-

54LS366ADMQB

Abstract: 54LS366AFMQB 54LS366ALMQB DM74LS366AM DM74LS366AN E20A J16A M16A 54ls366a
Contextual Info: LS366A NATIONAL SEMICOND {LOGIC} 31E D • tSDIIHS a07QQÔb T T - H 3 " 1,5 - 0 0 National Semiconductor 54LS366A/DM74LS366A Hex TRI-STATE Inverting Buffers General Description This device contains six independent gates each of which performs an Inverting buffer function. The outputs have the

Contextual Info: S E M IC O N D U C T O R tm DM74LS366A Hex 3-STATE Inverting Buffer sistors are turned off presenting a high-im pedance state to the bus line. Thus the output will act neither as a significant load nor as a driver. To m inim ize th e possibility th a t tw o o ut­

Contextual Info: DM54LS366A DM74LS366A Hex TRI-STATE Inverting Buffer General Description This device contains six independent gates each of which performs an inverting buffer function The outputs have the TRI-STATE feature When enabled the outputs exhibit the low impedance characteristics of a standard LS output with

54ls366a

Abstract: 54LS366ADMQB 54LS366AFMQB 54LS366ALMQB DM74LS366AM DM74LS366AN E20A J16A M16A N16E
Contextual Info: LS366A National Æ jê Semiconductor 54LS366A/DM74LS366A Hex TRI-STATE Inverting Buffers General Description This device contains six independent gates each of which performs an inverting buffer function. The outputs have the TRI-STATE feature. When enabled, the outputs exhibit the

Contextual Info: LS366A National Semiconductor 54LS366A/DM74LS366A Hex TRI-STATE Inverting Buffers General Description This device contains six independent gates each of which performs an inverting buffer function. The outputs have the TRI-STATE feature. When enabled, the outputs exhibit the

fv642

Contextual Info: September 1991 Semiconductor DM54LS366A/DM74LS366A Hex TRI-STATE Inverting Buffer General Description This device contains six independent gates each of which performs an inverting buffer function. The outputs have the TRI-STATE feature. When enabled, the outputs exhibit the

DM54LS366A

Abstract: DM54LS366AE DM54LS366AJ DM54LS366AW DM74LS366A DM74LS366AM DM74LS366AN E20A J16A M16A
Contextual Info: DM54LS366A DM74LS366A Hex TRI-STATE Inverting Buffer General Description This device contains six independent gates each of which performs an inverting buffer function The outputs have the TRI-STATE feature When enabled the outputs exhibit the low impedance characteristics of a standard LS output with