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    DM74AS113 Datasheets (2)

    National Semiconductor
    Part ECAD Model Manufacturer Description Datasheet Type PDF PDF Size Page count
    DM74AS113J
    		National Semiconductor Dual J-K Negative Edge Triggered Flip-Flops with Preset Scan PDF 81.58KB 3
    DM74AS113N
    		National Semiconductor Dual J-K Negative Edge Triggered Flip-Flops with Preset Scan PDF 81.58KB 3

    DM74AS113 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    74AS113

    Abstract: S113
    Contextual Info: PRELIMINARY Semiconductor DM54AS113/DM74AS113 Dual J-K Negative-EdgeTriggered Flip-Flops with Preset General Description Features The DM54AS113 is a dual-edge-triggered flip -flo p s . Each flip -flo p has individual J, K, clock, and preset inputs, and also com plem entary Q and Q ou tputs.


    OCR Scan     		dm54as113/dm74as113dm54as113dm74as113tl/f/6286-2+274as113s113 PDF