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    DM74AS112 Datasheets (2)

    National Semiconductor
    Part ECAD Model Manufacturer Description Datasheet Type PDF PDF Size Page count
    DM74AS112J
    		National Semiconductor Dual J-K Negative Edge Triggered Flip-Flops with Preset and Clear Scan PDF 88.15KB 3
    DM74AS112N
    		National Semiconductor Dual J-K Negative Edge Triggered Flip-Flops with Preset and Clear Scan PDF 88.15KB 3

    DM74AS112 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    74AS112

    Abstract: DM54AS1121DM74AS112 S112
    Contextual Info: DM54AS 112/ DM74AS 112 PRELIMINARY %9A National ÆjA Semiconductor DM74AS112 Dual J-K Negative-EdgeTriggered Flip-Flops with Preset and Clear General Description Features The 0M 54AS112 is a dual edge-triggered flip -flo p . Each flip -flo p has individual J, K, c lo c l^ c le a r and preset inputs,


    OCR Scan     		dm54as1121dm74as1120m54as112dm54as112dm74as112+3tl/f/6285-274as112s112 PDF