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    CXA1236

    Abstract: CXA1236Q
    Contextual Info: CXA1236Q S O N Y . Advance Information 8bit 500MSPS Single VIDEO DAC Note : This specification is subject to change. Features • • • • • • • • 500MHz update rate 8-tiit Multiplexed Inputs Sync., Blank, Ref. White and Bright 25 0 / 3 7 . 5 Q Load


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    500msps500mhzrs-343acxa1236q+3ae89677xx30cxxxcxa1236 PDF

    Contextual Info: Preliminary Information This document contains information on a new product. The parametric information, although not fully characterized, is the result of testing initial devices. Distinguishing Features Applications • • • • 400 MHz Pipelined Operation


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    10kh/100kbtl07_ PDF

    Contextual Info: Preliminary Information This document contains information on a new product. The parametric information, although not fully characterized, is the result of testing initial devices. Distinguishing Features Applications 360 MHz Pipelined Operation 256 x 8 Color Palette RAM


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    rs-343a68-pinbt492kg360bt492_ PDF

    500S41W

    Abstract: BT492
    Contextual Info: P relim inary In form ation This document contains information on a new product. The paramctric information, although not fully characterized, is the result of testing initial devices. D istin gu ishin g F eatures A p p lic a tio n s 360 MHz Pipelined Operation


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    bt492rs-343a68-pinbt492k+2bt492_500s41w PDF

    Contextual Info: SONY CXA3197R 10-bit 125MSPS D/A Converter Description The CXA3197R is a high-speed D/A converter which can perform multiplexed input of two system 1 0 -bit data. This IC realizes a maximum conversion rate of 125MSPS. Multiplexed operation is possible by inputing the 1 / 2 frequency-divided clock or by halving


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    cxa3197r10-bit125msps100msps+3a319748pinlqfp-48p-l01 PDF

    IV20U

    Contextual Info: Btl07 Distinguishing Features • • • • • • • • • • • Applications 400 MHz Pipelined Operation ±1/2 LSB Differential Linearity Error ±1/2 LSB Integral Linearity Error 500 ps Typical Rise/Fall Time RS-343A-Compatible Output 0 or 7.5 IRE Blanking Pedestal


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    btl07rs-343a-compatible100keclcompatible32-pin+610kh/100k90-percentdiv20utbu07bf400btl07_iv20u PDF

    Contextual Info: CXA1236Q SONY« 8 bit 500M SPS Single VIDEO DAC ECL input Description The C X A 1236Q is an ultra high-speed D / A converter th a t m ultiplexes tw o 8-bit in p u t data. This IC realizes a maximum conversion speed of 500MSPS and is suitable fo r signal


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    cxa1236q1236q500msps-cxa1236q+1qfp-44c-l01 PDF

    Contextual Info: H I31 9 7 HARRIS S E M I C O N D U C T O R Ê M M Ê # PRELIMINARY 10-Bit, 125 MSPS D/A Converter August 1997 Features Description • Maximum Conversion R a te. 125 MSPS The H 13197 is a high-speed D/A converter which can per­


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    10-bit PDF

    Contextual Info: H I3197 HARRIS S E M I C O N D U C T O R • M U f # PR E LIM IN A R Y August 1997 10-Bit, 125 MSPS D/A Converter Features Description • Maximum Conversion Rate. 125 MSPS The HI3197 is a high-speed D/A converter which can per­


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    400mw PDF

    Contextual Info: Btl07 Distinguishing Features Applications 400 MHz Pipelined Operation ±1/2 LSB Differential Linearity Error ±1/2 LSB Integral Linearity Error 500 ps Typical Rise/Fall Time RS-343A-Compatible Output 0 or 7.5 IRE Blanking Pedestal Ability to Handle 25 Q. Output


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    btl07rs-343a-compatible32-pin90-percent+4div20utbu07bf400btl07_bt107 PDF

    Contextual Info: HI3197 Semiconductor Data Sheet October 1998 File Number 4356.1 Features 10-Bit, 125 MSPS D/A Converter R esolution . 10 Bits T h e H I31 97 is a h ig h -sp e e d D /A co n v e rte r w h ich can


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    hi319710-bit PDF

    Contextual Info: Preliminary Information This document contains information on a new product. The parametric information, although not fully characterized, is the result of testing initial devices. Bt492 Distinguishing Features 360 MHz Pipelined Operation 256 x 8 Color Palette RAM


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    bt492rs-343a68-pin50-percent+310-percent90-percentbt492kg360 PDF

    Contextual Info: SONY CXA3197R 10-bit 125MSPS D/A Converter Description The CXA3197R is a high-speed D/A converter which can perform multiplexed input of two system 10-bit data. This IC realizes a maximum conversion rate of 125MSPS. Multiplexed operation is possible by inputing the 1/2 frequency-divided clock or by halving


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    10-bit125mspscxa3197r10omsps+2480mw48pin PDF