DIGITAL CLOCK USING LOGIC GATES Search Results

diode BY 399 itt

Abstract: Q20P010 M/Q20P025
Contextual Info: DEVICE SPECIFICATION ECL/TTL “TURBO ” LOGIC ARRAYS WITH PHASE-LOCKED LOOP Q20P010/Q20P025 FEATURES On-chip high frequency phase-locked loop Up to 1.25 GHz capability Edge jitter as low as 50 ps pk-pk 900 and 3000 gates of customizable digital logic Utilizes proven Q20000* Series macro library

gsm coding in c for 8051 microcontroller

Abstract: avr and gsm modem datasheet 8051 microcontroller Assembly language program 8051 microcontroller interface with gps gsm coding for 8051 microcontroller avr and gsm modem different vendors of cpld and fpga cell phones ip cores gsm modem atmel AT40K
Contextual Info: Selected Features Atmel’s FPSLIC : Field Programmable System Level IC System Level Integration FPSLIC devices integrate 5,000–40,000 gates of high-performance AT40K FPGA with 2K–18K bits of AT40K FreeRAM™ distributed SRAM, a high-performance 20+ MIPS RISC microcontroller with a

32x1-bit

Abstract: 16x2bit design ideas XCV100 XCV1000 XCV50 block selectram overview 32x1bit 4096 bit RAM
Contextual Info: COVER STORY - VIRTEX The New Virtex FPGA Family Much More Than Just a Million Gates… by Carlis Collins, Managing Editor of Corporate Communications, Xilinx, editor@xilinx.com Now, for the first time, you can create complete, highly complex, high-performance systems in a single programmable device. Using our new Virtex FPGAs and our new

atmel h020

Abstract: atmel 0713 ATMEL 620 spear linux uart baud rate spear AA13 ARM926EJ-S MAC110 PBGA420 SPEAR-09-H022
Contextual Info: SPEAR-09-H022 SPEAr Head200 ARM 926, 200K customizable eASIC™ gates, large IP portfolio SoC PRELIMINARY DATA Features • ARM926EJ-S - fMAX 266 MHz, 32 KI - 16 KD cache, 8 KI - KD TCM, ETM9 and JTAG interfaces ■ 200K customizable equivalent ASIC gates

XC2V1000 Pin-out

Abstract: Virtex-II Field-Programmable Gate Arrays XC2V80 IEEE1532 XC2V1000 XC2V1500 XC2V250 XC2V40 XC2V500
Contextual Info: Virtex-II 1.5V Field-Programmable Gate Arrays R DS031-1 v1.7 October 2, 2001 Advance Product Specification Summary of Virtex -II Features • Industry First Platform FPGA Solution • IP-Immersion Architecture - Densities from 40K to 8M system gates

A/ICE2QS03 Equivalence

Contextual Info: Using Formality in LSI Logic’s FlexStream Design Flow Anwar Ali Yoon Kim Chrystian Roy Eric Zann LSI Logic Milpitas, CA anwara@lsil.com ykim@lsil.com croy@lsil.com Abstract For large or complex System-on-a-Chip designs, which often consist of over one million gates,

atmel 838

Abstract: atmel 906 ATMEL 712 atmel 532 ATMEL 706 atmel 751 BGA 168 atmel 635 atmel 344 verilog code for 32 bit risc processor
Contextual Info: Features • High-speed - 100 ps Gate Delay - 2-input NAND, FO = 2 nominal • Up to 6.9 Million Used Gates and 976 Pins • System Level Integration Technology – Cores: ARM7TDMI and AVR RISC Microcontrollers, OakDSP™ and LodeDSPCores™, 10T/100 Ethernet MAC, USB and PCI Cores

ADM1166

Contextual Info: Super Sequencer with Margining Control and Nonvolatile Fault Recording ADM1166 FEATURES FUNCTIONAL BLOCK DIAGRAM AUX1 AUX2 REFIN REFOUT REFGND ADM1166 MUX VREF EEPROM PDO1 CONFIGURABLE OUTPUT DRIVERS LOGIC INPUTS OR SFDs (HV CAPABLE OF DRIVING GATES OF N-FET)

CVSD

Abstract: introduction to cvsd CVSD modulator CVSD demodulator voice scrambling AN-607-1 precision Sine Wave Generator HC-55564 application notes on Companding circuit diagram of voice recognition
Contextual Info: Harris Semiconductor No. AN607.1 Harris Linear January 1997 Delta Modulation For Voice Transmission Author: Don Jones Introduction Delta modulation has evolved into a simple, efficient method of digitizing voice for secure, reliable communications and for

EP1K50

Abstract: EPC1441 EPC16 JESD-71 EP1K10 EP1K100 EP1K30 24LE1
Contextual Info: ACEX 1K Programmable Logic Device Family June 2001, ver. 3.1 Features. Data Sheet • ■ ■ Table 1. ACEXTM 1K Device Features Feature EP1K10 EP1K30 EP1K50 EP1K100 Typical gates 10,000 30,000 50,000 100,000 Maximum system gates 56,000 119,000 199,000

dain capacitor 0.1uf 275v

Abstract: DSA0061667
Contextual Info: PRELIMINARY TECHNICAL DATA a 14-Bit, 40/65 MSPS Monolithic A/D Converter AD9244 Preliminary Technical Data 6-12-02 APPLICATIONS Communications Subsystems Microcell, Picocell Medical and High End Imaging Equipment Ultrasound Equipment PRODUCT DESCRIPTION

SPT7855

Abstract: SPT7855SCD SPT7855SCN R30I
Contextual Info: @ SPT SIGNAL PROCESSING TECHNOLOGIES SPT7855 10-BIT, 25 MSPS, 135 mW A/D CONVERTER FEATURES APPLICATIONS • Monolithic 25 MSPS Converter • 135 mW Power Dissipation • All High-Speed Applications Where Low Power Dissipation is Required • Video Imaging

processor based Circuit Diagram

Abstract: m9 6pin
Contextual Info: ArcticLink Device Data Sheet •••••• Programmable Solution Platform Including Hi-Speed Universal Serial Bus USB 2.0 On-The-Go (OTG) and SD/SDIO/MMC/CE-ATA Device Highlights • Up to 120 programmable I/Os available • 100,000 system gates

SPT7860

Contextual Info: SPT SIGNAL PROCESSING TECHNOLOGIES SPT78Ó O 10-BIT, 40 MSPS,175 mW A/D CONVERTER FEATURES APPLICATIONS • • • • • • • • • • ♦ All High-Speed Applications Where Low Power Dissipation is Required « Video Imaging ♦ Medical Imaging ♦ Radar Receivers

Contextual Info: S S P P T 7 SIGNAL PROCESSING TECHNOLOGIES APPLICATIONS • • • • • • • • • • • All High-Speed Applications Where Low Power Dissipation is Required • Video Imaging • Medical Imaging • ¡R Imaging • Digital Communications Monolithic 25 MSPS Converter

SPT7860

Contextual Info: S P SPT7860 T 10-BIT, 40 MSPS,175 mW A/D CONVERTER SIGNAL PROCESSING TECHNOLOGIES FEATURES APPLICATIONS • • • • • • • • • • All High-Speed Applications Where Low Power Dissipation is Required • Video Imaging • Medical Imaging • Radar Receivers

RLF 35-8/14N/2P-122

Contextual Info: @ S P SPT7860 T SIGNAL PROCESSING TECHNOLOGIES 10-BIT, 40 MSPS,175 mW A/D CONVERTER FEATURES APPLICATIONS • • • • • • • • • • • All High-Speed Applications Where Low Power Dissipation is Required • Video Imaging • Medical Imaging

Contextual Info: @ S P SPT7861 T SIGNAL PROCESSING TECHNOLOGIES 10-BIT, 40 MSPS,160 mW A/D CONVERTER FEATURES APPLICATIONS • • • • • • • • • • • All High-Speed Applications In Which Low Power Dissipation is Required • Video Imaging • Medical Imaging

Using Programmable Logic to Accelerate DSP Functions

Abstract: written knapp verilog code for distributed arithmetic implementation of 16-tap fir filter using fpga verilog code for fir filter using DA XC6200 xilinx FPGA IIR Filter design of FIR filter using vhdl abstract FIR filter verilog abstract
Contextual Info: Using Programmable Logic to Accelerate DSP Functions Steven K. Knapp Corporate Applications Manager Xilinx, Inc. 2100 Logic Drive San Jose, CA 95124 U.S.A. Xilinx Asia Pacific Unit 2308-2319, Tower 1 Metroplaza, Hing Fong Rd. Kwai Fong, N.T., HONG KONG

XTAL TH 5

Abstract: FX629 FX629J
Contextual Info: CML Semiconductor Products EW TI PRODUCT INFORMATION « FX629 Delta Modulation Codec for Military Applications Publication D /629/2 July 1994 Provisional Issue Features/Applications • • • • Designed to Meet Mil-Std-188-113 Military Communications Delta MUX, Switch and Phone

MIL-STD-188-113

Abstract: power supply Decoder BS9450 cvsd FX629 FX629J DELTA MODULATION ENCODER AND DECODER
Contextual Info: CML Semiconductor Products PRODUCT INFORMATION FX629 Delta Modulation Codec Publication D/629/2 July 1994 Provisional Issue Features/Applications Designed to Meet Mil-Std-188-113 Military Communications Single-Chip Full-Duplex Codec Programmable Sampling Clocks

Contextual Info: s^SPT SIGNALprocessing TECHNOLOGIES SPT7850 10-BIT, 20 MSPS, 140 mW A/D CONVERTER FEATURES APPLICATIONS • • • • • • • • • • • All High-Speed Applications Where Low Power Dissipation is Required • Video Imaging • Medical Imaging • ¡R Imaging

AD9467-250EBZ

Abstract: B0205F5050A00 AD9467BCPZ-250 AD9467 hsm2812 data sheet ANSI-644 567 tone AN-835 JESD51-2 AD9524
Contextual Info: 16-Bit, 200 MSPS/250 MSPS Analog-to-Digital Converter AD9467 75.5 dBFS SNR to 210 MHz at 250 MSPS 90 dBFS SFDR to 300 MHz at 250 MSPS SFDR at 170 MHz at 250 MSPS 92 dBFS at −1 dBFS 100 dBFS at −2 dBFS 100 dBFS SFDR at 100 MHz at 160 MSPS 60 fs rms jitter

Contextual Info: @ SPT SIGNAL PROCESSING TECHNOLOGIES SPT783S 10-BIT, 5 MSPS, 75 mW A/D CONVERTER FEATURES • • • • • • • • • • Monolithic 5 MSPS Converter 75 mW Power Dissipation On-Chip Track-and-Hold Single +5 V Power Supply TTL/CMOS Outputs 5 pF Input Capacitance