DIGITA ECHO DELAY Search Results

Contextual Info: I S G S -T H O M S O N ¿ 5 7 TS68951 me MODEM RECEIVE ANALOG INTERFACE TWO CHANNEL 12-BIT ANALOG TO DIGITAL CONVERTER FOR RECEPTION OF DIGITAL DATA FROM THE TELEPHONE LINE AND ECHO CANCELLATION with asynchronous multiplexing of 2 plesiochronous channels

EE60

Abstract: dc cdi schematic diagram ECHO schematic diagrams ts68950 vc-4095 DIP28 PLCC28 TS68951 TS68952 echo cancellation schematic diagram
Contextual Info: I S G S -T H O M S O N ¿ 5 TS68951 7 MODEM RECEIVE ANALOG INTERFACE TWO CHANNEL 12-BIT ANALOG TO DIGITAL CONVERTER FOR RECEPTION OF DIGITAL DATA FROM THE TELEPHONE LINE AND ECHO CANCELLATION with asynchronous multiplexing of 2 plesiochronous channels PROGRAMMABLE SWITCHED CAPACITOR

Contextual Info: HC-55564 HARRIS S E M I C O N D U C T O R Continuously Variable Slope Delta-Modulator CVSD J a n u a ry 1997 Features Description • All Digital T he H C -555 64 is a half duplex m od u la to r/d e m o d u la to r C M O S intergrated circu it used to co n ve rt voice sig na ls into serial NRZ

Contextual Info: H D 8 1 0 1 9 / 0 2 0 Terminal C O D E C For Digital Telephones Pin Arrangement D escription HD81019/20 is a single chip C O D E C specified for digital tele­ phone. This L S I contains the function of C O D EC with filters corre­ sponding to HD44270P series and also includes analog input/output

TS68950

Abstract: TS68951 TS68952
Contextual Info: THOMSON COMPONENTS C O M M U N I C A T IO N S P R O D U C T S DATA S H E E T CMOS T he T S 6 8 9 5 0 is a tra n s m it Tx an a lo g fro n t-e n d c irc u it designed to im p le m e n t h igh speed v o ic e -g ra d e m o d e m s up to 1 9 2 0 0 bps a c c o rd in g to th e C C IT T V .2 2 , V .2 6 , V .2 7 , V .2 9 , V .3 2 and V .33

TMS320C

Abstract: dh42 SC1129 SC11297CN dh44 Dh41
Contextual Info: Æ . SC11297 Modem Analog Front End V SIERRA SEMICONDUCTOR □ ±5 V CM O S technology □ 7 th o rd e r receive lo w -p ass filter □ A d a p tiv e h y b rid fu n ctio n for n e a r-e n d echo cancellation □ S u p p o rt m u lti-m o d e m o d em s fro m 300 b i t / s to 14.4 k b it/s

R2A15218FP

Abstract: R2S15201 r2s15904sp R2S15205FP R2A15218 R2A15108SP R2S15201DD r2a15108fp R2A15906SP R2A15106NP
Contextual Info: 2007.10 Everywhere you imagine. ^ ICs for audio products w w w .re n e sa s.co m JUT'ltTviD^ —x -f :* IC R e n e s a s I C s for a u d io p r o d u c t s p ro v id e y o u r s y s t e m w ith o p tim u m p r e s e n c e . I7 > 5 1' y ^ ' i b T < D ^ S s f f i j g * « * f c f c f c 5 3 / « '> 7 > ^

Contextual Info: is o 2-c m o s s t-b us-f a m ily MT8971B/72B M ITEL Digital Subscriber Interface Circuit Digital N etw ork Interface Circuit 9161-002-118-NA Features • • • • • • • • • ISSUE 2 Full duplex transmission over a single tw isted pair. Selectable 80 o r 160 kb it/s line rate.

DIGITA ECHO DELAY

Contextual Info: HC-5560 HARRIS S E M I C O N D U C T O R PCM Transcoder J a n u a ry 1997 Features Description • Single 5V S u p p ly .10mA Typ T he H C -556 0 digita l line tra n sco d e r provides e n cod ing and decod ing o f pseudo te rn a ry line code sub stitution schem es.

AX5253

Contextual Info: 19-1123; Rev 0; 9/96 V M X X IV M +3V, Q u a d 1 2 -B it Voltage-Output DAC with Sériai Interface jFeatures ♦ Four 12-Bit DACs with Configurable Output Amplifiers ♦ +3.0V to +3.6V Single-Supply Operation ♦ Low Supply Current: 0.82mA Normal Operation

MOTOROLA d1100

Abstract: max525 DIGITA ECHO DELAY IC 935
Contextual Info: 19-1096;Rev0;6/96 Low -Pow er, Quad, 12-B it Voltage-O utput DAC w ith S é ria i In te rfa c e Features ♦ Four 12-Bit DACs with Configurable Output Amplifiers ♦ +5V Single-Supply Operation ♦ Low Supply Current: 0.85mA Normal Operation 10pA Shutdown Mode

Contextual Info: H Preliminary Advanced Micro Devices Am79C02/A Dual Subscriber Line Audio-Processing Circuit DSLAC DISTINCTIVE CHARACTERISTICS Software program mable: -SLIC impedance -Trans-hybrid balance -Transmit and Receive gains -Equalization -Digital I/O pins -Tim e Slot Assigner

Contextual Info: RFX144V24-S23 and RFX96V24-S23 O Rockwell RFX144V24-S23 and RFX96V24-S23 MONOFAX Modem with DigiTalk Voice/ADPCM Audio, DigiTalk Speakerphone, and V.23 Full-Duplex Options INTRODUCTION The DigiTalk™ Speakerphone -S Option The Rockwell RFX144V24-S23 and RFX96V24-S23

Contextual Info: HC5517 HARRIS S E M I C O N D U C T O R Ringing SLIC Subscriber Line Interface Circuit J a n u a ry 1997 Features Description • Thru-SLIC Open Circuit Ringing Voltage up to 77VPEAK/54VRMS> 3 REN Capability at 44V rms The HC 5517 is a ringing SLIC designed to accom m odate a

R6628-12

Abstract: FR208 R96MFX R6628 ROCKWELL "eye pattern generator" monofax r96dfx ACC2057
Contextual Info: R96MFX MONOFAX Modems • ■ ■ Ü Í I m í Rockwell R96MFX 9600 bps MONOFAX Modem INTRODUCTION FEATURES The Rockwell R96MFX MONOFAX modem is a synchro­ nous 9600 bits per second bps half-duplex modem. The modem is housed in a single VLSI device package.

Contextual Info: s i 2 1993 Serial-Port, 16-Bit SoundPort Stereo Codec ANALOG ► DEVICES FEATURES Single-Chip Integrated 2A Digital Audio Stereo Codec Multiple Channels of Stereo Input and Output Digital Signal Mixing Programmable Gain and Attenuation On-Chip Signal Filters

fe 1.1s usb 2.0

Contextual Info: 19-1098; Rev 1; 12/96 L o w - P o w er, Quad, 12-Bi t V o l t a g e - O u t p u t DAC w i t h Ser i al I n t e r f a c e The MAX525 combines four low-power, voltage-output, 12-bit digital-to-analog converters DACs and four pre­ cision output amplifiers in a space-saving, 20-pin pack­

Contextual Info: intéT iATC 29C51 FEATURE CONTROL COMBO • Programmable /x/A-Law Select ■ External and User Programmable Transmit and Receive Gain ■ Flexible Signaling Interface ■ Programmable Internal and External Hybrid Balance Network Select ■ Secondary Analog Channel

Contextual Info: yuyjxiyu 19-1171; Rev 0; 12/96 L o w - P o w er, Quad, 10-Bi t V o l t a g e - O u t p u t DAC w i t h Se r i a l I n t e r f a c e The +5V MAX5250 combines tour low-power, voltageoutput, 10-bit digital-to-analog converters DACs and four precision output amplifiers in a space-saving, 20pin package. In addition to the four voltage outputs,

Contextual Info: 19-1098; Rev 1; 12/96 L o w - P o w e r , Quad, 12-Bit V o l t a g e - O u t p u t DAC w ith Serial Interface Each DAC has a double-buffered input organized as an input register followed by a DAC register. A 16-bit serial word loads data into each input/DAC register. The serial

Contextual Info: P r e l im in a r y P r o d u c t S p e c if ic a t io n Z80230 Z-BUS ESCC™ ENHANCED SERIAL C o m m u n ic a t io n C o n t r o l l e r FEATURES • Deeper Data FIFOs - 4-byte transm it FIFO - 8-byte receive FIFO ■ Program mable FIFO interrupt levels provide flexible

TXM TX 2E

Abstract: TMS320C6xx TLV320AD11A
Contextual Info: TLV320AD11A 3.3 V INTEGRATED ADSL OVER POTS CODEC SLWS087B – JUNE 1999 – REVISED MARCH 2000 D D D D D D D Complete Discrete Multitone DMT -Based Asymmetric Digital Subscriber Line (ADSL) Coder/Decoder (CODEC) Solution Complies With ANSI T1.413 Issue II and ITU

TXM TX 2E

Abstract: TLV320AD11A TMS320C6XX SCR11
Contextual Info: TLV320AD11A 3.3 V INTEGRATED ADSL OVER POTS CODEC SLWS087B – JUNE 1999 – REVISED MARCH 2000 D D D D D D D Complete Discrete Multitone DMT -Based Asymmetric Digital Subscriber Line (ADSL) Coder/Decoder (CODEC) Solution Complies With ANSI T1.413 Issue II and ITU

Contextual Info: DATA S H E E T M AY 1999 Revision 2.1 LXP710 HDSL Framer/Mapper for 1168 kbps Applications General Description The LXP710 is a complete HDSL framer/mapper that multiplexes and demultiplexes a framed or unframed 2.048 Mbps E l data stream onto two 1168 kbps H DSL lines. The LXP710 also