DFE EQUALIZER Search Results

T10E

Abstract: 2b1q decoder
Contextual Info: Delta Sheet DS 5, 09.00 Quad ISDN 2B1Q Echocanceller Digital Front End DFE-Q V2.1 PEB/F 24911 Version 2.1 This Delta Sheet lists the add-on features and differences between the DFE-Q V2.1 and the DFE-Q V1.3. 1 Power Supply The DFE-Q V2.1 requires a +3.3 V ±0.3 V power supply. The inputs and outputs remain

Contextual Info: MAX24101 15Gbps Octal Linear Equalizer General Description The MAX24101 restores high-frequency signal level at the decision-feedback equalizer DFE receiver for highloss backplane and cable channels. This permits the DFE receiver to meet BER goals. At 15Gbps, the MAX24101

G1D32

Abstract: "Hard Disk Drive" preamplifier hard disk head preamp DFE9952R mts servo controller EQUALIZER "DOWN SAMPLER" FILTER TAP coefficients ADAPTIVE EQUALIZER "DOWN SAMPLER" FILTER TAP coefficients adaptive equalizer error filter down sampler adaptive equalizer circuit down sampler DC50K
Contextual Info: Ob|ectlve Specification Philips Semiconductors DFE Read Signal Processor DFE9952R GENERAL DESCRIPTION The DFE9952R is a 200 Mbit/s Decision Feedback Equalization DFE read channel integrated circuit designed for hard disk drives. With enhanced decision feedback equalization implemented with advanced BiCMOS technology, the

Contextual Info: Decision Feedback Equalization in Stratix IV Devices AN-612-1.1 Application Note This application note describes the decision feedback equalization DFE feature found in the Stratix IV device equalizer. Use the DFE feature to improve the high frequency signal-to-noise ratio by compensating for inter-symbol interference (ISI).

H6850

Abstract: PEF24911 24911H PEF24911H Q67233 PEF 24911 Q67230-H1234 Q67233-H1233
Contextual Info: P RODUCT B RIEF IEC4-Q PEF 24911 V2.1 DFE-Q & PEF 24902 V2.1 (AFE) ISDN Echocancellation Circuit 4-Channel for 2B1Q Line Code The widely used ISDN 4-channel chipset IEC4-Q consisting of the analog frontend PEB/F 24902 (AFE) and the digital frontend PEB/F 24911 (DFE-Q) has been

10GBASE-LRM

Abstract: microcontroller pacemaker IQ2200 VSC8238 electronic dispersion compensator
Contextual Info: TRANSPORT PHYSICAL LAYER VSC8238 10.3125 Gbps Advanced Electronic Equalization with Limiting Amplifier, and Clock and Data Recovery BLOCK DIAGRAM: Initialization and Control Link Monitor Micro-Controller Interface Error Proxy VSC8238 VSC8238 FFE/DFE EQ Limiting Amplifier

10Gbase-kr backplane connector

Abstract: BCM8073 broadcom serdes data eye 1000BaseKX 10Gbase-kr transmitter LSI serdes CMOS CML 10G KR PHy 10GBASE-KR 1000BASE-KX Backplane 10Gbase KR
Contextual Info: BCM8073 Brief DUAL-CHANNEL SERIAL 10GBASE-KR TO XAUI TRANSCEIVER SUMMARY OF BENEFITS FEATURES • Two 10G-XAUI™ interfaces in one compact package • Targeted to meet the IEEE 802.3ap standard • High-performance DFE/FFE receive equalizer with full

bcm8071

Abstract: 1000BASE-KX Backplane 10G serdes 2.5 xaui 1000BaseKX 10G KR PHy 8b/10b encoder gearbox XAUI 1000BASE-X 4X CMU clock mhz
Contextual Info: BCM8071 SERIAL 10G BASE-KR TO XAUI BACKPLANE TRANSCEIVER SUMMARY OF BENEFITS FEATURES • New 10 GbE serial transceiver supporting high-bandwidth • Targeted to meet the draft IEEE 802.3ap standard backplane requirements • High performance DFE/FFE receive equalizer with full

Contextual Info: ICs for Communications Quad ISDN 2B1Q Echocanceller Digital Front End DFE-Q V2.1 PEF 24911 Version 2.1 Preliminary Data Sheet 06.99 PEF 24911 Revision History: Current Version: 06.99 Previous Version: Page in previous Version Page (in current Version) Subjects (major changes since last revision)

mark U1W

Abstract: V6DA DPA8 PEB 24901 SMD d1c smd diode D3B transistor SMD t05 CL15 aop 741 PEF24901
Contextual Info: ICs for Communications Quad ISDN 4B3T Echocanceller Digital Front End DFE-T V2.1 PEF 24901 Version 2.1 Preliminary Data Sheet 06.99 DS 1 • PEF 24901 Revision History: Current Version: 06.99 Previous Version: Page Page in previous (in current Version Version)

DS125RT410

Contextual Info: DS100RT410 www.ti.com SNLS448 – JANUARY 2013 DS100RT410 Low Power 10GbE Quad Channel Retimer Check for Samples: DS100RT410 FEATURES – DS100RT410 EQ+CDR+DE : 10.3125 Gbps – DS100DF410 (EQ+DFE+CDR+DE): 10.3125 Gbps – DS110RT410 (EQ+CDR+DE): 8.5 - 11.3 Gbps

DS125RT410

Contextual Info: DS100RT410 www.ti.com SNLS448 – JANUARY 2013 DS100RT410 Low Power 10GbE Quad Channel Retimer Check for Samples: DS100RT410 FEATURES – DS100RT410 EQ+CDR+DE : 10.3125 Gbps – DS100DF410 (EQ+DFE+CDR+DE): 10.3125 Gbps – DS110RT410 (EQ+CDR+DE): 8.5 - 11.3 Gbps

Contextual Info: Philips Semiconductors Preliminary specification ATSC 8-VSB Demodulator and Decoder PINNING • Feed forward including a decision feedback structure DFE • Range of -2.3 µs to +10.5 µs • Rate 2/3 (Rate 1/2 Ungerboeck code based) Reed-Solomon decoder

QSFP PCB design

Abstract: DS125RT410
Contextual Info: DS100RT410 www.ti.com SNLS448 – JANUARY 2013 DS100RT410 Low Power 10GbE Quad Channel Retimer Check for Samples: DS100RT410 FEATURES – DS100RT410 EQ+CDR+DE : 10.3125 Gbps – DS100DF410 (EQ+DFE+CDR+DE): 10.3125 Gbps – DS110RT410 (EQ+CDR+DE): 8.5 - 11.3 Gbps

QSFP

Abstract: DS125RT410
Contextual Info: DS100RT410 www.ti.com SNLS448 – JANUARY 2013 DS100RT410 Low Power 10GbE Quad Channel Retimer Check for Samples: DS100RT410 FEATURES – DS100RT410 EQ+CDR+DE : 10.3125 Gbps – DS100DF410 (EQ+DFE+CDR+DE): 10.3125 Gbps – DS110RT410 (EQ+CDR+DE): 8.5 - 11.3 Gbps

Contextual Info: SIEMENS ICs for Communications Quad ISDN 2B1Q Echocanceller Digital Front End Quad IEC DFE-Q PEB 24911 Version 1.2 PEF 24911 Version 1.2 Datasheet 12.97 DS 1 PEB 24911 Revision History: Original Version: Previous Releases: none Page Subjects changes since last revision

Mobile Train Radio Communication

Abstract: applications of Mobile Train Radio Communication NM6403
Contextual Info: Equalizers of the FUL DFE N,M Family on the NeuroMatrix NM6403 Processor V.G. Osipov RC "Module", Box: 166, Moscow, 125190, Russia Phone +7(095)152-9335, Fax: +7(095)152-4661, E-mail: vosip@module.ru WWW: http://www.module.ru ABSTRACT A large number of different devices aimed for communication link amplitude-frequency characteristics grading

Contextual Info: ICs for Communications Quad ISDN 4B3T Echocanceller Digital Front End DFE-T V2.1 PEF 24901 Version 2.1 Preliminary Data Sheet 06.99 PEF 24901 Revision History: Current Version: 06.99 Previous Version: Page in previous Version Page (in current Version) Subjects (major changes since last revision)

1TR220

Contextual Info: P P RELIMINARY R O D U C T B R I E F IEC4-T PEF 24901 V2.1 DFE-T PEF 24902 V2.1 (AFE) ISDN Echocancellation Circuit 4-Channel for 4B3T Line Code The widely used ISDN 4-channel chipset IEC4-T consisting of the analog frontend PEB/F 24902 (AFE) and the digital frontend PEB/F 24901

Transistor hall s41

Abstract: CEI-11G QSFP connector Xlaui 10 gbps transceiver board card fci tsmc design rule 40-nm QSFP QSFP 40G transceiver pcie gen3
Contextual Info: White Paper FPGAs at 40 nm and >10 Gbps: Jitter-, Signal Integrity-, Power-, and Process-Optimized Transceivers This paper describes key technologies that enable Stratix IV GT FPGAs to deliver the performance and capabilities necessary to support 40G/100G applications with integrated 11.3-Gbps transceivers. These include the LC-based oscillator and decision-feedback equalization DFE at 40 nm for ultra-low jitter FPGA transceivers. Furthermore, the

transistor SMD t05

Abstract: transistor t05 smd t05 package transistor pin configuration smd diode D3B ternary content addressable memory implementation for ternary content addressable PEB 2426 SMD d1c TS102080 mark U1W
Contextual Info: Da ta S he et, D S 1, S ep . 2 00 2 DFE-T V2.2 Quad ISDN 4B3T Echocanceller Digital Front End PEF 24901, Version 2.2 W i r ed Communications N e v e r s t o p t h i n k i n g . Edition 2002-09-30 Published by Infineon Technologies AG, St.-Martin-Strasse 53,

V21-12

Abstract: T10E
Contextual Info: De lta She et, DS 9, No v. 2 00 1 DFE-Q V2.1 Quad ISDN 2B1Q Echocanceller Digital Front End PEF 24911 Version 2.1 Wi r ed Communications N e v e r s t o p t h i n k i n g . Edition 2001-11-08 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 München, Germany

Contextual Info: Data Sheet, DS 2, Nov. 2000 DFE-Q V2.1 Quad ISDN 2B1Q Echocanceller D ig i t a l F ro n t E n d P E F 2 4 9 1 1 V er s i o n 2 . 1 Wired Communication N e v e r s t o p t h i n k i n g . Edition 2000-11-23 Published by Infineon Technologies AG, St.-Martin-Strasse 53,

SAFETY AWT 1 11

Abstract: ST30 ST01 ST10 ST11 ST20 ST21 ST31 Slot-1 MON8
Contextual Info: Delta She et, DS 2, Ju ne 2001 DFE-T V2.1 Quad ISDN 4B3T Echocanceller D ig i t a l F ro n t E n d P E F 2 4 9 0 1 V er s i o n 2 . 1 Wired Communications N e v e r s t o p t h i n k i n g . Edition 2001-06-22 Published by Infineon Technologies AG, St.-Martin-Strasse 53,