DELAY LINE 100NS Search Results

analog delay line

Contextual Info: 3-Bit Trimmable Analog Delay Line The 3-Bit Trimmable Analog Delay Lines manufactured by Engineered Components Company are designed to provide precise and stable delays for analog delay line applications. These are longer delay lines with digitally trimmable steps

Green Wave STEP 1500

Abstract: ttl 217 202 analog delay line
Contextual Info: 3-Bit Trimmable Analog Delay Line The 3-Bit Trimmable Analog Delay Lines manufactured by Engineered Components Company are designed to provide precise and stable delays for analog delay line applications. These are longer delay lines with digitally trimmable steps

7sip100

Contextual Info: 7 Pin SIP Tapped Passive Delay Line The 7 Pin SIP Tapped Passive Delay Lines manufactured by Engineered Components Company are designed to provide precise and stable delays for analog delay line applications. These tapped delay lines are provided in a small

Tapped

Abstract: 7sip100 analog delay line
Contextual Info: 7 Pin SIP Tapped Passive Delay Line The 7 Pin SIP Tapped Passive Delay Lines manufactured by Engineered Components Company are designed to provide precise and stable delays for analog delay line applications. These tapped delay lines are provided in a small

analog delay line

Contextual Info: 7 Pin SIP Passive Delay Line The 7 Pin SIP Passive Delay Lines manufactured by Engineered Components Company are designed to provide precise and stable delays for analog delay line applications. These untapped delay lines are provided in a small 7-pin SIP package and available in impedances of 50, 100, and 200 ohms.

10 GHz rf delay line

Abstract: PN9000 Aeroflex PN9000 PN9240 PN9712 PN9711 rf delay line PN9710 PN9713 phase shifter
Contextual Info: Tommorrow’s Phase Noise Testing Today PN9000 AUTOMATED PHASE NOISE MEASUREMENT SYSTEM DELAY LINE OPTIONS DELAY LINE DELAY LINE TO RF 50Ω τ =100 INPUT TO LO 50Ω 50Ω TO DL INPUT 50Ω 50Ω φ 50Ω τ=20/140nS TO LO INPUT TO LO 0 dBm Min 50Ω 50Ω

TDP20010

Contextual Info: Tap Delay Lines TDP FEATURES SIP 5-Tap Output Delay Lines • 7-pin Single In-line Package, Passive 5-tap Output Delay Line. • By adopting a non-magnetic-core coil, we have realized high reproducibility and very stable electrical characteristics over a wide temperature range.

ttl 217 202

Contextual Info: 4-Bit Programmable FAST TTL Logic Delay Line - EC2 1 of 5 Home EC2 . Robison Electronics Cornucopia Contact Us PROGRAMMABLE LOGIC DELAY LINES Background Passive Delay Lines Active Delay Lines

Contextual Info: PDU1016H data delay devices,vinc 4-BIT, ECL-INTERFACED PROGRAMMABLE DELAY LINE SERIES PDU1016H FEATURES PACKAGES Digitally programmable in 16 delay steps Monotonie delay-versus-address variation Precise and stable delays Input & outputs fully 10KH-ECL interfaced & buffered

Contextual Info: PDU54 data delay devices,vinc 4-BIT, ECL-INTERFACED PROGRAMMABLE DELAY LINE SERIES PDU54 FEATURES PACKAGES IN Digitally programmable in 16 delay steps Monotonie delay-versus-address variation Precise and stable delays Input & outputs fully 100K-ECL interfaced & buffered

PDU14F

Abstract: PDU14F-1 PDU14F-10 PDU14F-15 PDU14F-2 PDU14F-3 PDU14F-4 PDU14F-5
Contextual Info: PDU14F data 3  delay devices, inc. 4-BIT PROGRAMMABLE DELAY LINE SERIES PDU14F FEATURES • • • • • • • • PACKAGES Digitally programmable in 16 delay steps Monotonic delay-versus-address variation Two separate outputs: inverting & non-inverting

Contextual Info: PDU14F data 3  delay devices, inc. 4-BIT PROGRAMMABLE DELAY LINE SERIES PDU14F FEATURES • • • • • • • • PACKAGES Digitally programmable in 16 delay steps Monotonic delay-versus-address variation Two separate outputs: inverting & non-inverting

delay line 400ns

Abstract: 80T5400 80T5250 8T50
Contextual Info: ALLEN A V IO N IC S, INC. 80T CASE TYPE 5 TAP ACTIVE DELAY LINE 80G CASE TYPE 1 TAP ACTIVE DELAY LINE SPECIFICATIONS: Supply voltage: Delay tolerances: MECHANIC: 5.0 VDC ± 10% ± 2ns or ± 5% whichever is greater Rise Time: 4ns max • Operating temp.range:0 X to + 7 0 ”C

205061

Abstract: DLN19501 500061
Contextual Info: 195MHz SAW Delay Line 25MHz Bandwidth China Electronics Technology Group Corporation No.26 Research Institute SIPAT Co., Ltd. Part Number: DLN19501 www. sipatsaw.com Features — SAW Delay-Line — Single-Ended Operation — DIP Package — Electrostatics Sensitive Device ESD

PDU1016H-6

Abstract: PDU1016H PDU1016H-1 PDU1016H-2 PDU1016H-3 PDU1016H-4 PDU1016H-5
Contextual Info: PDU1016H data 3  delay devices, inc. 4-BIT, ECL-INTERFACED PROGRAMMABLE DELAY LINE SERIES PDU1016H FEATURES • • • • • PACKAGES Digitally programmable in 16 delay steps Monotonic delay-versus-address variation Precise and stable delays Input & outputs fully 10KH-ECL interfaced & buffered

Contextual Info: ACTIVE DIGITAL DELAY LINES SERIES A01 - SINGLE DELAY SERIES A03 - TRIPLE DELAY • ■ ■ ■ ■ Economical cost, prompt delivery! Wide varieties of values, 10nS to 500nS TTL compatible Operating temperature: 0°C to 70°C New! Single output SIP delay line now available

Contextual Info: PDU54 FEATURES • • • • •  data 3 delay devices, inc. 4-BIT, ECL-INTERFACED PROGRAMMABLE DELAY LINE SERIES PDU54 PACKAGES Digitally programmable in 16 delay steps Monotonic delay-versus-address variation Precise and stable delays Input & outputs fully 100K-ECL interfaced & buffered

Contextual Info: PDU1016H data 3  delay devices, inc. 4-BIT, ECL-INTERFACED PROGRAMMABLE DELAY LINE SERIES PDU1016H FEATURES • • • • • PACKAGES Digitally programmable in 16 delay steps Monotonic delay-versus-address variation Precise and stable delays Input & outputs fully 10KH-ECL interfaced & buffered

PDU54

Abstract: PDU54-100 PDU54-1000 PDU54-200 PDU54-250 PDU54-400 PDU54-500 PDU54-750
Contextual Info: PDU54 data 3 delay devices, inc. 4-BIT, ECL-INTERFACED PROGRAMMABLE DELAY LINE SERIES PDU54 FEATURES • • • • •  PACKAGES Digitally programmable in 16 delay steps Monotonic delay-versus-address variation Precise and stable delays Input & outputs fully 100K-ECL interfaced & buffered

analog delay line

Abstract: "analog delay line" analog delay
Contextual Info: Trimmable Analog Delay Line - EC2 1 of 5 Home Background Passive Delay Lines Untapped Tapped Programmable Active Delay Lines Digital Modules Inductors Hall-Effect Sensors PDF Catalogs Technical Info Search Products .

Contextual Info: ALLEN A V I O N I C S INC A LLEN A V IO N ICS, INC. 5H Z D 'T'Hl'll? 05Q5fl3fl 0000^53 =140 • 80T CASE TYPE 5 TAP ACTIVE DELAY LINE 80G CASE TYPE 1 TAP ACTIVE DELAY LINE SPECIFICATIONS: MECHANIC: • Supply voltage: • Delay tolerances: 5.0 VDC ± 10% ± 2ns or ± 5 %

Contextual Info: Cozu -profile SIP LUMPED CO N STAN T PASSIVE DELAY LINE _ _ j # Analog input and output # Delays stable and precise # 8-pin SIP package .230 high # Available in delays from 1 to 100ns # Precise, fixed delay

Contextual Info: 3D9950 8-BIT ADJUSTABLE, COAXIAL PASSIVE DELAY LINE SERIES 3D9950 FEATURES •      PACKAGE Delay adjustable in 255 steps Delay step sizes of 0.25ns to 1ns available Fast rise time for high frequency applications I/O reversible BNC female connectors

FDG1010

Abstract: FDG3010 FDG40010 FDG6010 FDG7010 FDG2010 FDG4010 FDG5010 FDG8010 fdg45
Contextual Info: Fixed Delay Lines FDG Low-cost Mid-speed SIP Fixed Delay Lines Based on ELMEC’s expertise in producing High-speed Delay Lines, the FDG-type mid-speed SIP Fixed Delay Line reduces the number of internal elements by 1/3 to 1/2. FEATURES • By reducing the number of elements, the Passband will