DDS-3 DATA SHEET Search Results

Contextual Info: a CMOS 300 MHz Quadrature Complete-DDS A 1 9854 PRELIMINARY TECHNICAL DATA Automatic Bi-directional Frequency Sweep SIN X)/X Correction Simplified Control Interface: 10 IVHz Serial, 2 or 3-wire SPI compatible or 100 IVHz Parallel 8-Bit Byte Programming -t3.3VSingle Supply

AD9854 DDS based CLOCK GENERATOR 10MHZ

Abstract: Sine Wave Generator using 8051 AD9854ASQ 8051 interfacing with ad9854 AD9852 AD9854 AD9854AST 53A2
Contextual Info: a CMOS 300 MHz Quadrature Complete-DDS AD9854 PRELIMINARY TECHNICAL DATA Automatic Bi-directional Frequency Sweep SIN X /X Correction Simplified Control Interface: 10 MHz Serial, 2 or 3-wire SPI compatible or 100 MHz Parallel 8-Bit Byte Programming +3.3 V Single Supply

Contextual Info: Mixed-Signal Front End Set-Top Box, Cable Modem AD9877 FUNCTIONAL BLOCK DIAGRAM FEATURES COS Tx DATA Tx 12 INTERPOLATOR FILTER Tx DAC 3 SIN PLL SPORT PROFILE DDS 12 4 CONTROL FUNCTIONS 2 8 RxIQ DATA 12 CA Σ-Δ SDELTA0 Σ-Δ SDELTA1 REFCLK ADC I IN ADC Q IN

AD9873

Abstract: AD9877 OP250 REF12 AD9877ABS v8322
Contextual Info: Mixed-Signal Front End Set-Top Box, Cable Modem AD9877 FUNCTIONAL BLOCK DIAGRAM FEATURES COS Tx DATA Tx 12 INTERPOLATOR FILTER Tx DAC 3 SIN PLL SPORT PROFILE DDS 12 4 CONTROL FUNCTIONS 2 8 RxIQ DATA 12 CA Σ-Δ SDELTA0 Σ-Δ SDELTA1 REFCLK ADC I IN ADC Q IN

Contextual Info: Mixed-Signal Front End Set-Top Box, Cable Modem AD9879 FUNCTIONAL BLOCK DIAGRAM FEATURES I TX Q ⇑16 TX DATA 12 TX DAC DDS Σ-∆ Σ-∆_OUT CA_PORT 4 SPORT CONTROL REGISTERS MCLK PLL XM/N 2 RXIQ[3:0] MUX 8 RXI ADC MUX 2 RXQ 10 RXIF[11:0] ADC RX10 MUX 12

AD9879

Abstract: AD9873 0x03-0x04
Contextual Info: Mixed-Signal Front End Set-Top Box, Cable Modem AD9879 FUNCTIONAL BLOCK DIAGRAM FEATURES I TX Q ⇑16 TX DATA 12 TX DAC DDS Σ-∆ Σ-∆_OUT CA_PORT 4 SPORT CONTROL REGISTERS MCLK PLL XM/N 2 RXIQ[3:0] 8 MUX RXI ADC MUX 2 RXQ 10 RXIF[11:0] ADC RX10 MUX 12

qualcomm 75

Abstract: Q0310-1 Q2334I-30N
Contextual Info: ÛUALCOMM I N C / Q u a l c o bt»E B • ^0Q333b OQQOQtifi fc.'îS a a m Q2334 DUAL DIRECT DIGITAL SYNTHESIZER Technical D a ta Sheet i ÛUAL ÖUALCOMM IN C / bbE D WÊ T D D 3 3 3 b _ Q2334 Dual Direct Digital GOG GÜ bT 521

Qualcomm DDS

Abstract: AN2334-4 Q0310-1 qualcomm 75
Contextual Info: Q u a lco m m Q2334 DUAL DIRECT DIGITAL SYNTHESIZER Technical Data Sheet Q2334 D ual D irect D ig ital S yn thesizer 2 Other QUALCOMM VLSI Products • Viterbi Decoders - 256 Kbps to 25 Mbps Maximum Data Rates • Phase Locked Loop PLL Frequency Synthesizers

AMI encoder

Abstract: LXT441 DATASHEET SCR scr applications circuit diagram EIA530
Contextual Info: lx1dstfr.fm4 Page 17 Wednesday, June 12, 1996 2:54 PM Preliminary Information APRIL, 1996 DATA SHEET LXT441 Switched 56/DDS Integrated DSU/CSU 1 Features General Description The LXT441 is an integrated transcei ver and data formatter for Switched 56 SW56 and Digital Data Service (DDS)

Contextual Info: 3.5 GSPS Direct Digital Synthesizer with 12-Bit DAC AD9914 Data Sheet FEATURES Software and hardware controlled power-down 88-lead LFCSP package PLL REF CLK multiplier Phase modulation capability Amplitude modulation capability Multichip synchronization 3.5 GSPS internal clock speed

Contextual Info: 3.5 GSPS Direct Digital Synthesizer with 12-Bit DAC AD9914 Data Sheet FEATURES 1.8 V/3.3 V power supplies Software and hardware controlled power-down 88-lead LFCSP package PLL REF CLK multiplier Phase modulation capability Amplitude modulation capability 3.5 GSPS internal clock speed

AD9914

Abstract: ad9914bcpz polar modulator 32DDS hexadecimal 978MHz 2.4GHZ synthesizer
Contextual Info: 3.5 GSPS Direct Digital Synthesizer with 12-Bit DAC AD9914 Data Sheet FEATURES 1.8 V/3.3 V power supplies Software and hardware controlled power-down 88-lead LFCSP package PLL REF CLK multiplier Phase modulation capability Amplitude modulation capability 3.5 GSPS internal clock speed

229CG

Contextual Info: = M,b" I DATA SHEET 229CG Framer FEATURES • Multiple line-format capability □ AMI and HDB3 CEPT □ Bipolar and B8ZS • Multiple DS1 TDM frame formats □ Independent formats — D4, SLC Carrier, ESF, and DDS T1DM (DS1) □ CCITT 30-channel format, with optional

Contextual Info: 2.5 GSPS Direct Digital Synthesizer with 12-Bit DAC AD9915 Data Sheet FEATURES Software and hardware controlled power-down 88-lead LFCSP package PLL REF CLK multiplier Phase modulation capability Amplitude modulation capability Multichip synchronization 2.5 GSPS internal clock speed

Contextual Info: 1 GSPS, 14-Bit, 3.3 V CMOS Direct Digital Synthesizer AD9910 Data Sheet FEATURES APPLICATIONS 1 GSPS internal clock speed up to 400 MHz analog output Integrated 1 GSPS, 14-bit DAC 0.23 Hz or better frequency resolution Phase noise ≤ −125 dBc/Hz @ 1 kHz offset (400 MHz carrier)

Contextual Info: 3.5 GSPS Direct Digital Synthesizer with 12-Bit DAC AD9914 Data Sheet FEATURES 1.8 V/3.3 V power supplies Software and hardware controlled power-down 88-lead LFCSP package PLL REF CLK multiplier Phase modulation capability Amplitude modulation capability 3.5 GSPS internal clock speed

Contextual Info: 3.5 GSPS Direct Digital Synthesizer with 12-Bit DAC AD9914 Data Sheet FEATURES 1.8 V/3.3 V power supplies Software and hardware controlled power-down 88-lead LFCSP package PLL REF CLK multiplier Phase modulation capability Amplitude modulation capability 3.5 GSPS internal clock speed

Contextual Info: 2.5 GSPS Direct Digital Synthesizer with 12-Bit DAC AD9915 Data Sheet FEATURES Software and hardware controlled power-down 88-lead LFCSP package PLL REF CLK multiplier Phase modulation capability Amplitude modulation capability Multichip synchronization 2.5 GSPS internal clock speed

Contextual Info: 2.5 GSPS Direct Digital Synthesizer with 12-Bit DAC AD9915 Data Sheet FEATURES Software and hardware controlled power-down 88-lead LFCSP package PLL REF CLK multiplier Phase modulation capability Amplitude modulation capability Multichip synchronization 2.5 GSPS internal clock speed

low frequency sine oscillator

Abstract: fsk generator using timer 555 7pin AD9910 fpga radar Delay linear sweep generator using 555 timer
Contextual Info: 1 GSPS, 14-Bit, 3.3 V CMOS Direct Digital Synthesizer AD9910 Data Sheet FEATURES APPLICATIONS 1 GSPS internal clock speed up to 400 MHz analog output Integrated 1 GSPS, 14-bit DAC 0.23 Hz or better frequency resolution Phase noise ≤ −125 dBc/Hz @ 1 kHz offset (400 MHz carrier)

Contextual Info: 2.5 GSPS Direct Digital Synthesizer with 12-Bit DAC AD9915 Data Sheet FEATURES Software and hardware controlled power-down 88-lead LFCSP package PLL REF CLK multiplier Phase modulation capability Amplitude modulation capability Multichip synchronization 2.5 GSPS internal clock speed

LSE B3 transformer

Abstract: LSE B10 transformer LSE B3 LSE B4 transformer LSE B9 transformer multiplexers 74 LS 150 LSE B6 transformer AMI coder LSE B10 LSE B6
Contextual Info: LXT400 TABLE OF CONTENTSAPRIL, 1996 All Rate Extended Range SW56/DDS Transceiver DATA SHEET LXT400 G NFORMATION AllENERAL Rate IExtended Range Switched 56 / DDS Transceiver 1 GeneralSHORT Description Features T1/E1 -HAUL TRANSCEIVERS AND RECEIVERS 2 The LXT400 is an integrated line interface circuit for Switched

ANALOG DEVICES ad9106

Contextual Info: Quad, Low Power, 12-Bit, 180 MSPS, Digital-toAnalog Converter and Waveform Generator AD9106 Data Sheet FEATURES GENERAL DESCRIPTION Highly integrated quad DAC On-chip 4096 x 12-bit pattern memory On-chip DDS Power dissipation at 3.3 V, 4 mA output 315 mW at 180 MSPS