DD1313 Search Results

Contextual Info: CY7C344 CY7C344B W w CYPRESS 32-Macrocell MAX EPLD Features Functional Description • High-performance, high-density re­ placement for TTL, 74HC, and cus­ tom logic • 32 macrocells, 64 expander product terms in one LAB • 8 dedicated inputs, 16 I/O pins

Contextual Info: INTEGRATED CIRCUITS UC1875/6/7/8 UC2875/6/7/8 UC3875/6/7/8 UNITRODE Phase Shift Resonant Controller FEATURES DESCRIPTION « Zero to 100% Duty Cycle Control The UC1875 family of integrated circuits implements control of a bridge power stage by phase-shifting the

Contextual Info: 19- 0305 ; Rev 2: 9/95 JVW YXAJSn 5 V I3 .3 V or A djustable, High-Efficiency, Low-Dropout, Step-Down DC-DC Controllers _ G e n e ra l D e s c rip tio n F e a tu re s ♦ More than 90% Efficiency 10mA to 1.5A Loads ♦ More than 12.5W Output Power

QFP32

Abstract: BA3558K qfp32 package
Contextual Info: BA3558K Post amplifier for CD player The BA3558K is a post amplifier for a CD player. It consists of low-pass filter, a de-emphasis mute circuit, and a headphone amplifier. Features • available in a QFP32 package • a ripple filter for the power supply for

msi motherboard circuit diagram

Abstract: MSI MOTHERBOARD schematic diagram MSI MOTHERBOARD SERVICE MANUAL amd MOTHERBOARD SERVICE MANUAL L64811 circuit diagram of msi motherboard MOTHERBOARD msi CIRCUIT diagram intel D102 motherboard sparkit-40 l64863
Contextual Info: • 5304A04 LSI LOGIC 0013137 531 El LLC 53D4AD4 001313A 47fl LLC LSI Logic has derived the material in this manual, which describes the L64863 Clock Chip, from documents provided by Sun Microsystems, Inc. The chip described in this manual is guaranteed to function as described only when

Cypress cy7c344

Abstract: 74HC 7C344 C344 CY7C344 CY7C344B TW417
Contextual Info: CY7C344 CY7C344B CYPRESS 32-Macrocell MAX EPLD Features Functional Description • A v ailab le in a 2 8 -p in 300-m il DTP o r w in ­ d o w e d J -le a d e d c e ra m ic c h ip c a rrie r H L C C , th e C Y 7 C 3 4 4 /C Y 7 C 3 4 4 B r e p r e ­ s e n ts th e d e n s e s t E P L D o f th is size. E ig h t

Contextual Info: s lim M k m SSI 73M550 SSI 73M1550/2550 s A TDK Group/Company UART with FIFOs December 1993 DESCRIPTION FEATURES The SSI 73M550 is a Universal Asynchronous Re­ ceiver/Transmitter UART with receive and transmit FIFO buffers. The 16-byte FIFO registers are active

tea 1601 t

Contextual Info: CMOS ST-BUS FAMILY MITEL Digital Subscriber Line Interface Circuit Features ISSUE 2 Compatible with ISDN U-lnterface standard Over 40dB @40 kHz of loop attenuation Full duplex transmission over single twisted pair Advanced echo cancelling technology

planar trans

Abstract: L64811 VA1112 l64863
Contextual Info: LSI LOGIC SBGHÖQM ÜÜ13GS3 ÖT3 miLC L 64860 E rror C orrectin g M em ory C on troller EMC T echnical M anual * mm* e * &’ à & 5 3 0 4 6 0 4 0 0 1 3 0 5 4 73T LLC LSI Logic has derived the material in this manual, which describes the L64860 Error Correcting Memory Controller, from documents provided by Sun Micro­