DB12A Search Results

DB12A

Abstract: DB11A DB1B DB11B AD7264 AD1582 AD780 ADR431 2.4964 DB12 A
Contextual Info: 1 MSPS, 14-Bit, Simultaneous Sampling SAR ADC with PGA and Four Comparators AD7264 FEATURES GENERAL DESCRIPTION The AD7264 is a dual, 14-bit, high speed, low power, successive approximation ADC that operates from a single 5 V power supply and features throughput rates of up to 1 MSPS per on-chip

Contextual Info: FEATURES FUNCTIONAL BLOCK DIAGRAM Dual, simultaneous sampling, 14-bit, 2-channel ADC True differential analog inputs Programmable gain stage: x1, ×2, ×3, ×4, ×6, ×8, ×12, ×16, ×24, ×32, ×48, ×64, ×96, ×128 Throughput rate per ADC 1 MSPS for AD7264

Contextual Info: AN-1248 APPLICATION NOTE One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com SPI Interface by Miguel Usach INTRODUCTION MASTER-SLAVE COMPATIBILITY The SPI bus interface is widely used for synchronous data

Contextual Info: 1 MSPS, 14-Bit, Simultaneous Sampling SAR ADC with PGA and Four Comparators AD7264 FUNCTIONAL BLOCK DIAGRAM FEATURES VREFA AVCC REF VA+ VA– AD7264 BUF PGA 14-BIT SUCCESSIVE APPROXIMATION ADC T/H The AD7264 is a dual, 14-bit, high speed, low power, successive

DB11B

Abstract: DB12A DB11A DB13A
Contextual Info: 1 MSPS, 14-Bit, Simultaneous Sampling SAR ADC with PGA and Four Comparators AD7264 FEATURES FUNCTIONAL BLOCK DIAGRAM REF VA+ VA– The AD7264 contains four comparators. Comparator A and Comparator B are optimized for low power, whereas Comparator C and Comparator D have fast propagation delays. The AD7264

DB11A

Abstract: 2.4964
Contextual Info: FEATURES FUNCTIONAL BLOCK DIAGRAM Dual, simultaneous sampling, 14-bit, 2-channel ADC True differential analog inputs Programmable gain stage: x1, ×2, ×3, ×4, ×6, ×8, ×12, ×16, ×24, ×32, ×48, ×64, ×96, ×128 Throughput rate per ADC 1 MSPS for AD7264