DATA SHEET URM Search Results

Contextual Info: LatticeECP2/M Family Data Sheet DS1006 Version 02.4, March 2007 LatticeECP2/M Family Data Sheet Introduction March 2007 Advance Data Sheet DS1006 • Pre-Engineered Source Synchronous I/O Features • DDR registers in I/O cells • Dedicated gearing logic

LFE2M20E-5FN256C

Contextual Info: LatticeECP2/M Family Data Sheet DS1006 Version 02.8, August 2007 LatticeECP2/M Family Data Sheet Introduction August 2007 Advance Data Sheet DS1006 • Pre-Engineered Source Synchronous I/O Features • DDR registers in I/O cells • Dedicated gearing logic

T 4148

Abstract: PR65A
Contextual Info: LatticeECP2/M Family Data Sheet DS1006 Version 02.9, September 2007 LatticeECP2/M Family Data Sheet Introduction August 2007 Advance Data Sheet DS1006 • Pre-Engineered Source Synchronous I/O Features • DDR registers in I/O cells • Dedicated gearing logic

Contextual Info: LatticeECP2/M Family Data Sheet DS1006 Version 02.2, December 2006 LatticeECP2/M Family Data Sheet Introduction December 2006 Advance Data Sheet DS1006 • Pre-Engineered Source Synchronous I/O Features • DDR registers in I/O cells • Dedicated gearing logic

LFE2-20E-5FN256I

Abstract: lfe2m35e-7fn484c LFE2M50E-5F484C LFE2M50E-5FN484C LFE2M50E5F484C lfe2m35e7fn484c LFE2M50E-6FN484C
Contextual Info: LatticeECP2/M Family Data Sheet DS1006 Version 02.3, February 2007 LatticeECP2/M Family Data Sheet Introduction December 2006 Advance Data Sheet DS1006 • Pre-Engineered Source Synchronous I/O Features • DDR registers in I/O cells • Dedicated gearing logic

TBA 931

Contextual Info: LatticeECP2 Family Data Sheet DS1006 Version 01.1, August 2006 LatticeECP2 Family Data Sheet Introduction August 2006 Advance Data Sheet DS1006 Features • Dedicated gearing logic • Source synchronous standards support – SPI4.2, SFI4, XGMII – High Speed ADC/DAC devices

6H5n-1

Abstract: LFXP10C-3F256I lfxp10c3 LFXP20C-5F256C lfxp15c-4f256 LFXP10C-4F256I LFXP6C-5F256C LFXP20C-4F256C lfxp10c-3 lfxp15c-4
Contextual Info: LatticeXP Family Data Sheet Version 01.0, February 2005 LatticeXP Family Data Sheet Introduction February 2005 Advance Data Sheet • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2

Contextual Info: LatticeXP Family Data Sheet Version 03.0, September 2005 LatticeXP Family Data Sheet Introduction July 2005 Advance Data Sheet • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2

Lattice Semiconductor Package Diagrams 256-Ball fpBGA

Abstract: 16-bit adder
Contextual Info: LatticeECP2/M Family Data Sheet DS1007 Version 02.1, September 2006 LatticeECP2/M Family Data Sheet Introduction September 2006 Advance Data Sheet DS1007 • Pre-Engineered Source Synchronous I/O Features • DDR registers in I/O cells • Dedicated gearing logic

lfe2

Abstract: PL25B
Contextual Info: LatticeECP2/M Family Data Sheet DS1006 Version 02.6, April 2007 LatticeECP2/M Family Data Sheet Introduction April 2007 Advance Data Sheet DS1006 • Pre-Engineered Source Synchronous I/O Features • DDR registers in I/O cells • Dedicated gearing logic

16X4

Abstract: PR72A
Contextual Info: LatticeECP2 Family Data Sheet Version 01.0, February 2006 LatticeECP2 Family Data Sheet Introduction February 2006 Advance Data Sheet Features • Source synchronous standards support – SPI4.2, SFI4, XGMII – High Speed ADC/DAC devices • Dedicated DDR and DDR2 memory support

PR88A

Contextual Info: LatticeECP2/M Family Data Sheet DS1006 Version 02.5, March 2007 LatticeECP2/M Family Data Sheet Introduction March 2007 Advance Data Sheet DS1006 • Pre-Engineered Source Synchronous I/O Features • DDR registers in I/O cells • Dedicated gearing logic

PR4B

Contextual Info: LatticeXP Family Data Sheet Version 01.1, April 2005 LatticeXP Family Data Sheet Introduction February 2005 Advance Data Sheet • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2

Contextual Info: LatticeXP Family Data Sheet Version 04.0, December 2005 LatticeXP Family Data Sheet Introduction December 2005 Data Sheet • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2 − LVTTL

Contextual Info: LatticeXP Family Data Sheet Version 02.0, July 2005 LatticeXP Family Data Sheet Introduction July 2005 Advance Data Sheet • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2 − LVTTL

LFXP6C-4FN256C

Abstract: LFXP6C-3FN256I LFXP LFXP10C-3F256I LFXP3C 5TN100C DDR333 LFXP10 LVCMOS25 LVCMOS33 LFXP3C-3TN144C
Contextual Info: LatticeXP Family Data Sheet DS1001 Version 05.1, November 2007 LatticeXP Family Data Sheet Introduction July 2007 Data Sheet DS1001  Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces:  LVCMOS 3.3/2.5/1.8/1.5/1.2

PT15B

Contextual Info: LatticeXP Family Data Sheet Version 04.1, February 2006 LatticeXP Family Data Sheet Introduction December 2005 Data Sheet • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2 − LVTTL

LFXP20C-4F484C

Contextual Info: LatticeXP Family Data Sheet DS1001 Version 04.6, June 2006 LatticeXP Family Data Sheet Introduction December 2005 Data Sheet DS1001 • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2

PT15B

Contextual Info: LatticeXP Family Data Sheet DS1001 Version 04.8, December 2006 LatticeXP Family Data Sheet Introduction December 2005 Data Sheet DS1001 • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2

Contextual Info: LatticeXP Family Data Sheet Version 01.2, May 2005 LatticeXP Family Data Sheet Introduction May 2005 Advance Data Sheet Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2 − LVTTL – SSTL 18 Class I

Contextual Info: LatticeXP Family Data Sheet Version 01.3, June 2005 LatticeXP Family Data Sheet Introduction May 2005 Advance Data Sheet Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2 − LVTTL – SSTL 18 Class I

LFXP10C-4FN256C

Abstract: PB27A PT15B LFXP15C-5FN388C LFXP10C5FN256C LFXP3C-3QN208C LFXP6C-5FN256C LFXP10C-4FN388C LFXP6C-5TN144C LFXP20C-5FN484C
Contextual Info: LatticeXP Family Data Sheet Version 04.5, May 2006 LatticeXP Family Data Sheet Introduction December 2005 Data Sheet • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2 − LVTTL

Contextual Info: LatticeXP Family Data Sheet DS1001 Version 04.7, August 2006 LatticeXP Family Data Sheet Introduction December 2005 Data Sheet DS1001 • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2

Contextual Info: LatticeXP Family Data Sheet DS1001 Version 05.0, July 2007 LatticeXP Family Data Sheet Introduction July 2007 Data Sheet DS1001 • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2