DATA ENTRY Search Results

DOU-00012698

Contextual Info: HUBER+SUHNER DATA SHEET Cable terminator: 86_CT-0-2-5/111_N Description Straight PCB cable terminator for flexible cable Technical Data Electrical Data Impendance Not defined Mechanical Data Cable entry Environmental Data Operating Temperature 2002/95/EC RoHS

Contextual Info: Freescale Semiconductor Data Sheet: Technical Data Document Number: MPC5668X Rev. 4, 01/2011 MPC5668x MPC5668x Microcontroller Data Sheet MPC5668x features: • 32-bit CPU core complex e200z650 – Compliant with Power Architecture embedded category – 32 KB unified cache with line locking and eight-entry

M7020R

Abstract: M7020R-050ZA1 M7020R-066ZA1 M7020R-083ZA1
Contextual Info: M7020R 32K x 68-bit Entry NETWORK SEARCH ENGINE PRELIMINARY DATA FEATURES SUMMARY • 32K DATA ENTRIES IN 68-BIT MODE ■ ■ Figure 1. 272-ball PBGA Package TABLE MAY BE PARTITIONED INTO UP TO FOUR 4 QUADRANTS (Data entry width in each octant is configurable

M7040N

Contextual Info: M7040N 64K x 72-bit Entry NETWORK PACKET SEARCH ENGINE PRELIMINARY DATA FEATURES SUMMARY • 64K DATA ENTRIES IN 72-BIT MODE ■ ■ Figure 1. 388-ball PBGA Package TABLE MAY BE PARTITIONED INTO UP TO EIGHT 8 OCTANTS (Data entry width in each octant is configurable

DSP56166

Contextual Info: Corrections to the DSP56166 Data Sheet Dated 6/15/93 1. Remove the entry for the BIAS pin page 9 of the 6/15/93 data sheet

GPIOC12

Abstract: 56800E 56F8000 56F8036 DSP56800E MC56F8036 56f8000 BOOTLOADER
Contextual Info: 56F8036 Data Sheet Preliminary Technical Data 56F8000 16-bit Digital Signal Controllers MC56F8036 Rev. 3 01/2007 freescale.com Document Revision History Version History Description of Change Rev. 0 Initial public release. Rev. 1 • In Table 10-4, added an entry for flash data retention with less than 100 program/erase

56800E

Abstract: 56F8000 56F8036 DSP56800E MC56F8036 MC56F8036VLF
Contextual Info: 56F8036 Data Sheet Technical Data 56F8000 16-bit Digital Signal Controllers MC56F8036 Rev. 6 02/2010 freescale.com Document Revision History Version History Description of Change Rev. 0 Initial public release. Rev. 1 • In Table 10-4, added an entry for flash data retention with less than 100 program/erase

56F802X

Contextual Info: 56F8036 Data Sheet Preliminary Technical Data 56F8000 16-bit Digital Signal Controllers MC56F8036 Rev. 1 11/2006 freescale.com Document Revision History Version History Description of Change Rev. 0 Initial public release. Rev. 1 • In Table 10-4, added an entry for flash data retention with less than 100 program/erase

mc56f8036

Contextual Info: 56F8036 Data Sheet Preliminary Technical Data 56F8000 16-bit Digital Signal Controllers MC56F8036 Rev. 2 12/2006 freescale.com Document Revision History Version History Description of Change Rev. 0 Initial public release. Rev. 1 • In Table 10-4, added an entry for flash data retention with less than 100 program/erase

eeprom cross reference

Abstract: freescale superflash
Contextual Info: 56F8023 Data Sheet Preliminary Technical Data 56F8000 16-bit Digital Signal Controllers MC56F8023 Rev. 1 11/2006 freescale.com Document Revision History Version History Description of Change Rev. 0 Initial public release. Rev. 1 • In Table 10-4, added an entry for flash data retention with less than 100 program/erase

Contextual Info: 56F8033/56F8023 Data Sheet Technical Data 56F8000 16-bit Digital Signal Controllers MC56F8023 Rev. 6 02/2010 freescale.com Document Revision History Version History Description of Change Rev. 0 Initial public release. Rev. 1 • In Table 10-4, added an entry for flash data retention with less than 100 program/erase

Contextual Info: 56F8037/56F8027 Data Sheet Technical Data 56F8000 16-bit Digital Signal Controllers MC56F8037 Rev. 8 04/2012 freescale.com Document Revision History Version History Description of Change Rev. 0 Initial public release. Rev. 1 • In Table 10-4, added an entry for flash data retention with less than 100 program/erase

56F8033

Abstract: 56F802x 4kb2 56800E 56F8000 56F8023 MC56F8023 freescale superflash
Contextual Info: 56F8033/56F8023 Data Sheet Technical Data 56F8000 16-bit Digital Signal Controllers MC56F8023 Rev. 6 02/2010 freescale.com Document Revision History Version History Description of Change Rev. 0 Initial public release. Rev. 1 • In Table 10-4, added an entry for flash data retention with less than 100 program/erase

Contextual Info: Data Sheet Fujitsu ETERNUS CS High End V5.1 on S11 Data Protection Appliance Data Sheet Fujitsu ETERNUS CS High End V5.1 Data Protection Appliance Radically simplifying data protection ETERNUS CS Data Protection Appliances The Fujitsu ETERNUS CS storage solutions,

LV164

Abstract: IN74LV164 IN74LV164D IN74LV164N IZ74LV164
Contextual Info: TECHNICAL DATA IN74LV164 8-BIT SERIAL-IN/PARALLEL-OUT SHIFT REGISTER The IN74LV164 is a low-voltage Si-gate CMOS device and is pin and function compatible with the IN74HC/HCT164. The IN74LV164 is an 8-bit edge-triggered shift register with serial data entry and an output from each of the eight stages. Data is entered

barcode reader

Abstract: CR1200 universal battery charger for mobile bluetooth modem USB CABLE application of bluetooth technology javascript barcode scanner
Contextual Info: Barcode Readers www.BradyID.com Printing Guide Barcode Readers Brady offers several different barcode readers solutions for your data collection and tracking applications, including basic data entry, tracking, shipping & receiving, UID initiatives, WIP and more.

IS43R16400B

Contextual Info: IS43R16400B ADVANCED INFORMATION 4Mx16 JANUARY 2011 64Mb DDR SDRAM FEATURES DEVICE OVERVIEW • Double-data rate architecture; two data transfers per clock cycle • Bidirectional, data strobe DQS is transmitted/ received with data, to be used in capturing data

IS43LR16160D-75BLI

Contextual Info: IS43LR16160D, IS43LR32800D 8Mx32, 16Mx16 256Mb Mobile DDR SDRAM FEATURES: • Double-data rate architecture; two data transfers per clock cycle • Bidirectional, data strobe DQS is transmitted/ received with data, to be used in capturing data at the receiver

Contextual Info: IS43LR16160D, IS43LR32800D 8Mx32, 16Mx16 256Mb Mobile DDR SDRAM FEATURES: • Double-data rate architecture; two data transfers per clock cycle • Bidirectional, data strobe DQS is transmitted/ received with data, to be used in capturing data at the receiver

Contextual Info: IS43R16800D, IS43R32400D PRELIMINARY INFORMATION 4Mx32, 8Mx16 SEPTEMBER 2008 128Mb DDR SDRAM FEATURES DEVICE OVERVIEW • Double-data rate architecture; two data transfers per clock cycle • Bidirectional, data strobe DQS is transmitted/ received with data, to be used in capturing data

issi 8Mx16 SDRAM

Abstract: ISSI 346
Contextual Info: IS43R16800D, IS43R32400D PRELIMINARY INFORMATION 4Mx32, 8Mx16 JULY 2009 128Mb DDR SDRAM FEATURES DEVICE OVERVIEW • Double-data rate architecture; two data transfers per clock cycle • Bidirectional, data strobe DQS is transmitted/ received with data, to be used in capturing data

IS43R32400D

Abstract: 43R32400D IS43R32400D-5BL
Contextual Info: IS43R32400D 4Mx32 SEPTEMBER 2011 128Mb DDR SDRAM FEATURES DEVICE OVERVIEW • Double-data rate architecture; two data transfers per clock cycle • Bidirectional, data strobe DQS is transmitted/ received with data, to be used in capturing data at the receiver

Contextual Info: IS43LR16800D, IS43LR32400D 4Mx32, 8Mx16 128Mb Mobile DDR SDRAM FEATURES: • Double-data rate architecture; two data transfers per clock cycle • Bidirectional, data strobe DQS is transmitted/ received with data, to be used in capturing data at the receiver

IS43R16400B

Contextual Info: IS43R16400B DECEMBER 2011 4Mx16 64Mb DDR SDRAM FEATURES DEVICE OVERVIEW • Double-data rate architecture; two data transfers per clock cycle • Bidirectional, data strobe DQS is transmitted/ received with data, to be used in capturing data at the receiver