DAG2 Search Results

dsp 32 c processor

Abstract: ADSP-21000 multi-processor ADSP-2106X
Contextual Info: SHARC Glossary Term Definition core processor or processor core ADSP-21000 core DSP processor—program sequencer, instruction cache, timer, DAG1, DAG2, register file R15-0 , computation units. Does not include ADSP-2106x’s internal memory, external port, and I/O processor.

ADSP-21489 user manual

Abstract: ADSP-21487 sharc ADSP-214xx FFT Accelerator medialb ADSP-21160 ADSP-21161 ADSP-21489 ADSP21487 sharc iir filter IBIS Model diode
Contextual Info: SHARC Processor SUMMARY The ADSP-2148x processors are available with unique audiocentric peripherals, such as the digital applications interface, serial ports, precision clock generators, S/PDIF transceiver, asynchronous sample rate converters, input

sinusoidal encoder

Abstract: SRS50 stegmann sinusoidal "signals generation" stegmann SRS50 encoder PWM simulation matlab optical quadrature encoder 32bit encoders stegmann SRS50 fixed point implementation matlab
Contextual Info: EXTRACTION OF HIGH RESOLUTION POSITION INFORMATION FROM SINUSOIDAL ENCODERS J. Burke, J. F. Moynihan, K. Unterkofler Abstract - Precision motion control in industrial automation systems is placing increasing demands on the position feedback mechanisms used in the

BC136

Abstract: ADSP-21160 ADSP-21161 ADSP-21362 ADSP-21363 ADSP-21364 ADSP-21365 ADSP-21366 key board mtm 8 pins key board mtm
Contextual Info: SHARC Processors SUMMARY DEDICATED AUDIO COMPONENTS High performance 32-bit/40-bit floating point processor optimized for high performance audio processing Single-instruction, multiple-data SIMD computational

transistor SMD BR21

Abstract: SMD Transistor W08 adsp-21369ksz smd w04 74 smd code t04 smd code W06 transistor SMD W06 sMD .v05 smd transistor w04 SMD Transistors w06 56
Contextual Info: a SHARC Processors ADSP-21367/ADSP-21368/ADSP-21369 SUMMARY Code compatible with all other members of the SHARC family The ADSP-21367/ADSP-21368/ADSP-21369 are available with a 333 MHz core instruction rate with unique audiocentric peripherals such as the digital audio interface, S/PDIF

ADSP-2100

Abstract: PROM BURNER ADDS-2110 dma13 ADSP-2100A ADSP-2100AJG ADSP-2100AKG ADSP-2100JG ADSP-2100JP ADSP-2100KG
Contextual Info: ANALOG DEVICES FEATURES Pin- and Code-Com patible DSP Microprocessors ADSP-2100, 6.144M Hz and 8.192M Hz ADSP-2100A, 10.24M Hz and 12.5MHz Separate Program and Data Buses, Extended Off-Chip Single-Cycle Direct Access to 16K x 16 of Data M em ory Single-Cycle Direct Access to 32K x 24 of Program

ADSP-21000

Abstract: ADSP-21020 ADSP-21060 ADSP-21062 ADSP-21062L tddg
Contextual Info: a ADSP-2106x SHARC DSP Microcomputer Family ADSP-21062/ADSP-21062L SUMMARY High Performance Signal Processor for Communications, Graphics and Imaging Applications Super Harvard Architecture Four Independent Buses for Dual Data Fetch, Instruction Fetch and Nonintrusive I/O

H-a16t

Abstract: ADSP-2191M HA16 Peripheral interface 8255 pinout MO-205-AC adsp-2191-mbst-140
Contextual Info: a DSP Microcomputer ADSP-2191M PERFORMANCE FEATURES 6.25 ns Instruction Cycle Time, for up to 160 MIPS Sustained Performance ADSP-218x Family Code Compatible with the Same Easy to Use Algebraic Syntax Single-Cycle Instruction Execution Single-Cycle Context Switch between Two Sets of Computation and Memory Instructions

ADSP-21062

Abstract: ADSP-21062L ADSP-21065L
Contextual Info: a Computer Products Division ADSP-21062 & ADSP-21062L Anomaly List for Revision 3.0 June 27, 2000 These anomalies represent the currently known differences between the revision 3.0 ADSP21062/ADSP-21062L and the functionality specified in the ADSP-21062 data sheet dated April

addressing mode in core i7

Abstract: ADSP-21060 ADSP-21060L ADSP-21065L
Contextual Info: a Computer Products Division ADSP-21060 & ADSP-21060L Anomaly List for Revision 2.1 June 27, 2000 These anomalies represent the currently known differences between the revision 2.1 ADSP21060/ADSP-21060L and the functionality specified in the ADSP-21060 data sheet dated

73D13

Abstract: AD73322 ADSP-2100 ADSP-2181 ADSP-2188M ADSP-2189M load program on ADSP-2189M
Contextual Info: a DSP Microcomputer ADSP-2188M System Interface Flexible I/O Structure Allows 2.75 V or 3.3 V Operation; All Inputs Tolerate up to 3.6 V Regardless of Mode 16-Bit Internal DMA Port for High-Speed Access to On-Chip Memory Mode Selectable 4 MByte Memory Interface for Storage of Data Tables

SPORT

Abstract: ADSP-2106x ADSP-21062 ADSP-21062L ADSP-21065L
Contextual Info: a Computer Products Division ADSP-21062 & ADSP-21062L Anomaly List for Revision 2.0 & 2.1 June 27, 2000 These anomalies represent the currently known differences between the revisions 2.0 & 2.1 ADSP-21062 and the functionality specified in the ADSP-2106x data sheet dated April 1998 and

NM6403

Abstract: LCS14
Contextual Info: NM6403 Digital Signal Processor Architectural Overview Revision 1.2 431282.001D2 This page was intentionally left blank. Contents 1 General Description .4

Contextual Info: JON 4 ANALOG ► DEVICES FEATURES Complete 50 MHz DSP Microcomputer ADSP-2100 Code & Function Compatible 2K Words of Program Memory RAM 1K Word of Data Memory RAM Separate Program and Data Buses On-Chip Dual Purpose Program Memory for Both Instruction and Data Storage

Contextual Info: ADSP-2106x SHARC DSP Microcomputer Family ADSP-21062/ADSP-21060 ANALOG DEVICES SUMMARY High Performance Signal Processor for Communica­ tions, Graphics, and Imaging Applications Super Harvard ARchitecture Computer SHARC — Four Independent Buses for Dual Data Fetch,

Contextual Info: The program memory PMD, PMA buses and data memory (DMA, DMD) buses extend off-chip to provide direct connections to external memories. The DMD bus is the primary bus for routing data internally and to/from external data memory. The 14-bit DMA bus provides direct addressing of 16K x 16 of external

Contextual Info: ANALOG DEVICES □ 32/40-Bit IEEE Floating-Point DSP Microprocessor ADSP-21020 FE A T U R E S Superscalar IEEE Floating-Point Processor Off-Chip Harvard Architecture M axim izes Signal Processing Performance 30 ns, 33.3 M IP S Instruction Rate. Single-Cycle

Contextual Info: ADSP-21060 Industrial SHARC DSP Microcomputer Family ADSP-21060C/ADSP-21060LC ANALOG DEVICES SU M M A R Y High Performance Signal Processor for Com munica­ tions, Graphics, and Im aging Applications Super Harvard Architecture Four Independent Buses for Dual Data Fetch,

Contextual Info: ANALOG DEVICES Mixed-Signal Processor with Host Interface Port ADSP-21 msp50A/55A/56A FEATURES 77 ns Instruction Cycle Time from 13.00 MHz Crystal ADSP-2100 Family Code & Function Compatible 2K Words of On-Chip Program Memory RAM 1K Words of On-Chip Data Memory RAM

Contextual Info: 32/40-Bit IEEE Floating-Point DSP Microprocessor ADSP-21020 ANALOG DEVICES FUNCTIONAL BLOCK DIAGRAM FEATURES Superscalar IEEE Floating-Point Processor Off-Chip Harvard Architecture Maxim izes Signal Processing Performance 30 ns, 33.3 MIPS Instruction Rate, Single-Cycle

Contextual Info: ANALOG ► DEVICES DSP Microcomputer ADSP-2105 FEATURES Complete DSP Microcomputer 100 ns Instruction Cycle Time from 10 MHz Crystal ADSP-2100 Code- & Function-Compatible ADSP-2101 Pin-Compatible 1K Words of On-Chip Program Memory RAM 512 Words of On-Chip Data Memory RAM

Contextual Info: ADSP-2106X SHARC DSP Microcomputer Family ANALOG DEVICES ADSP-21061/ADSP-21061L S UM M AR Y High Performance Signal Com puter for Speech, Sound, Graphics and Imaging Applications Super Harvard Architecture Com puter SHARC — Four Independent Buses for Dual Data, Instructions,

Contextual Info: JÄN 1 7 1992 DSP Microcomputer with Host Interface Port ADSP-2111 ANALOG ► DEVICES FUNCTIONAL BLOCK DIAGRAM FEATURES Complete DSP Microcomputer 60 ns Instruction Cycle Time from 16.67 MHz Crystal ADSP-2100 Family Code & Function Compatible 2K Words of On-Chip Program Memory RAM

Contextual Info: JUN 7 1993 ANALOG ► DEVICES DSP Microcomputer FUNCTIONAL BLOCK DIAGRAM FEATURES Complete DSP Microcomputer 60 ns Instruction Cycle Time from 16.67 MHz Crystal ADSP-2100 Family Code & Function Compatible 2K Words of On-Chip Program Memory RAM 1K Word of On-Chip Data Memory RAM