D3Q DAC Search Results

6811 SO8

Contextual Info: 2.7 V to 5.5 V, <100 µA, 14-Bit nanoDAC D/A in SC70 Package AD5641 FUNCTIONAL BLOCK DIAGRAM FEATURES 6-lead SC70 package Micropower operation: 100 µA max at 5 V Power-down to typically 0.2 µA at 3 V Single 14-bit DAC A Version: ±16 LSB INL 2.7 V to 5.5 V power supply

AD5641BKSZ

Abstract: TA 8256 equivalent
Contextual Info: Data Sheet 2.7 V to 5.5 V, <100 µA, 14-Bit nanoDAC, SPI Interface in LFCSP and SC70 AD5641 FEATURES FUNCTIONAL BLOCK DIAGRAM 6-lead LFCSP and SC70 packages Micropower operation: 100 µA maximum at 5 V Power-down to typically 0.2 µA at 3 V Single 14-bit DAC

AD5641

Abstract: ADSP-2101
Contextual Info: 2.7 V to 5.5 V, <100 µA, 14-Bit nanoDAC , SPI Interface in SC70 Package AD5641 FUNCTIONAL BLOCK DIAGRAM FEATURES VDD 6-lead SC70 package Micropower operation: 100 µA max at 5 V Power-down to typically 0.2 µA at 3 V Single 14-bit DAC A version: ±16 LSB INL

AD5641

Abstract: ADSP-2101 AD5641BKSZ
Contextual Info: 2.7 V to 5.5 V, <100 A, 14-Bit nanoDAC, SPI Interface in SC70 Package AD5641 FEATURES FUNCTIONAL BLOCK DIAGRAM VDD 6-lead SC70 package Micropower operation: 100 μA maximum at 5 V Power-down to typically 0.2 μA at 3 V Single 14-bit DAC B version: ±4 LSB INL

AD5641BKSZ-REEL7

Contextual Info: Data Sheet 2.7 V to 5.5 V, <100 µA, 14-Bit nanoDAC, SPI Interface in LFCSP and SC70 AD5641 FEATURES FUNCTIONAL BLOCK DIAGRAM VDD 6-lead LFCSP and SC70 packages Micropower operation: 100 µA maximum at 5 V Power-down to typically 0.2 µA at 3 V Single 14-bit DAC

D3Q DAC

Abstract: AD5641 ADSP-2101 ADMu1300
Contextual Info: 2.7 V to 5.5 V, <100 A, 14-Bit nanoDAC , SPI Interface in SC70 Package AD5641 FUNCTIONAL BLOCK DIAGRAM FEATURES 6-lead SC70 package Micropower operation: 100 μA max at 5 V Power-down to typically 0.2 μA at 3 V Single 14-bit DAC A version: ±16 LSB INL

"digital baseband" receiver demodulator LPF amplifier ADC compensate

Abstract: MAX407 PSK demodulator schematic for DSP 100-PIN MAX2101 MAX2101CMQ MAX418 21-7003A
Contextual Info: 19-0298; Rev 3; 1/96 KIT ATION EVALU ABLE AVAIL 6-Bit Quadrature Digitizer The MAX2101 6-bit quadrature digitizer combines quadrature demodulation with analog-to-digital conversion on a single bipolar silicon die. This unique RF-to-Bits TM function bridges the gap between existing RF downconverters and CMOS digital signal processors DSP .

100-PIN

Abstract: MAX2101 MAX2101CMQ MAX407 MAX418 lnb schematic crystal 25mhz schematic diagram catv receiver satellite varactor diode sample problems
Contextual Info: 19-0298; Rev 4; 5/96 KIT ATION EVALU ABLE AVAIL 6-Bit Quadrature Digitizer The MAX2101 6-bit quadrature digitizer combines quadrature demodulation with analog-to-digital conversion on a single bipolar silicon die. This unique RF-to-Bits TM function bridges the gap between existing RF downconverters and CMOS digital signal processors DSPs .

AD9288BST-80

Contextual Info: 8-Bit, 40/80/100 MSPS Dual A/D Converter AD9288 FUNCTIONAL BLOCK DIAGRAM FEATURES AINA T/H AINA Battery-powered instruments Hand-held scopemeters Low cost digital oscilloscopes I and Q communications ADC 8 REFINA REFOUT AINB ENCB 8 T/H ADC SELECT 2 8 TIMING

SN74VCX86

Abstract: AD9288 ad9288-100 AD9218 AD9288BST-100 AD9288BST-40 AD9288BST-80 D3Q DAC TSW-140-08-L-D-RA
Contextual Info: 8-Bit, 40/80/100 MSPS Dual A/D Converter AD9288 FUNCTIONAL BLOCK DIAGRAM FEATURES AINA T/H AINA Battery-powered instruments Hand-held scopemeters Low cost digital oscilloscopes I and Q communications ADC 8 REFINA REFOUT AINB ENCB 8 T/H ADC SELECT 2 8 TIMING

AD9218BST-105

Abstract: AD9218 AD9218BST-40 AD9218BST-65 AD9218BST-80 AD9218BST-RL40 AD9218BST-RL65 AD9288 r32545 38-P2
Contextual Info: a FEATURES Dual 10-Bit, 40 MSPS, 65 MSPS, 80 MSPS, and 105 MSPS ADC Low Power: 275 mW at 105 MSPS per Channel On-Chip Reference and Track/Holds 300 MHz Analog Bandwidth Each Channel SNR = 57 dB @ 41 MHz, Encode = 80 MSPS 1 V p-p or 2 V p-p Analog Input Range Each Channel

SN74VCX86

Abstract: AD9218BSTZ-105 AD9218 AD9288 resistor pack x9 D8P analog devices
Contextual Info: 10-Bit, 40/65/80/105 MSPS 3 V Dual Analog-to-Digital Converter AD9218 Dual 10-bit, 40 MSPS, 65 MSPS, 80 MSPS, and 105 MSPS ADC Low power: 275 mW at 105 MSPS per channel On-chip reference and track-and-hold 300 MHz analog bandwidth each channel SNR = 57 dB @ 41 MHz, Encode = 80 MSPS

AD9218BST-105

Contextual Info: 10-Bit, 40/65/80/105 MSPS 3 V Dual Analog-to-Digital Converter AD9218 FEATURES ENCODE A AD9218 TIMING AINA T/H ADC AINA OUTPUT / REGISTER / 10 10 REFINA REFOUT AINB ENCODE B T/H ADC OUTPUT / / 10 REGISTER 10 D9B TO D0B TIMING VD APPLICATIONS USER SELECT NO. 1

datasheet opamp 2Y

Abstract: opamp 2Y AD9218 AD9218-105PCB AD9218-65PCB AD9218BST-40 AD9288 bd-9b 13E40 AD8138 "pin-compatible"
Contextual Info: a FEATURES Dual 10-Bit, 40 MSPS, 65 MSPS, 80 MSPS, and 105 MSPS ADC Low Power: 275 mW at 105 MSPS per Channel On-Chip Reference and Track/Holds 300 MHz Analog Bandwidth Each Channel SNR = 57 dB @ 41 MHz, Encode = 80 MSPS 1 V p-p or 2 V p-p Analog Input Range Each Channel

SAA7151B

Abstract: SAA7191 SAA7191B SAA9051 SAA9065 U714
Contextual Info: P relim in a ry s p e c ific a tio n P h ilip s S e m ic o n d u c to rs V ideo P ro d u c ts Video enhancement . and D/A processor VEDA 1. FEATURES -CM O S circuit to enhance video data and to convert luminance and colour-difference signals from digital-to-analog

AD8138

Abstract: AD8139 AD9215 AD9216 AD9216-105 AD9216BCPZ-105 AD9238 AD9248
Contextual Info: 10-Bit, 105 MSPS Dual A/D Converter AD9216 FEATURES Integrated dual 10-bit ADC Single 3 V supply operation 2.85 V to 3.15 V SNR = 57 dBc (to Nyquist, AD9216-105) SFDR = 75 dBc (to Nyquist, AD9216-105) Low power: 300 mW at 105 MSPS Differential input with 300 MHz 3 dB bandwidth

AD9216

Abstract: AD9216BCPZ-105 AD9216BCPZ-65 AD9216BCPZ-80 AD9238 AD9248
Contextual Info: 10-Bit, 65/80/105 MSPS Dual A/D Converter AD9216 Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use.

1/TDA 7392

Abstract: dc/tda 7392 7392
Contextual Info: +3 V, Parallel Input Micropower 10- and 12-Bit DACs AD7392/AD7393 ANALOG DEVICES FEATURES Micropower: 100 jiA 0.1 (jiA Typical Power S hutdow n Single-Supply +2.7 V to +5.5 V Operation Compact 1.1 mm Height TSSOP-20 Package A D 7392/12-B it Resolution A D 7393/10-B it Resolution

Contextual Info: 10-Bit, 65/80/105 MSPS Dual A/D Converter AD9216 FUNCTIONAL BLOCK DIAGRAM FEATURES Integrated dual 10-bit ADC Single 3 V supply operation SNR = 57.6 dBc to Nyquist, AD9216-105 SFDR = 74 dBc (to Nyquist, AD9216-105) Low power: 150 mW/ch at 105 MSPS Differential input with 300 MHz 3 dB bandwidth

Contextual Info: 19-0298; R e v 2 ; 5 /9 5 Æ / J X I A I 6-B it Q uadrature D igitizer _ Features ♦ ADCs Provide Greater than 5.5 Effective Bits at fS = 60Msps, f|N = 15MHz The M AX2101’s sim ple receiver subsystem is designed for digital com m unications system s such as those i. sed

AD9216-105

Abstract: AD9216 AD9216BCPZ-105 AD9216BCPZ-65 AD9216BCPZ-80 AD9238 AD9248 r61506
Contextual Info: 10-Bit, 65/80/105 MSPS Dual A/D Converter AD9216 FEATURES Integrated dual 10-bit ADC Single 3 V supply operation SNR = 57.6 dBc to Nyquist, AD9216-105 SFDR = 74 dBc (to Nyquist, AD9216-105) Low power: 150 mW/ch at 105 MSPS Differential input with 300 MHz 3 dB bandwidth

MAX2395

Abstract: MAX5864 MAX5864ETM MAX5865 MAX5865EVKIT
Contextual Info: 19-2915; Rev 1; 10/03 KIT ATION EVALU E L B AVAILA Ultra-Low-Power, High-DynamicPerformance, 22Msps Analog Front End Applications Features ♦ Integrated Dual 8-Bit ADCs and Dual 10-Bit DACs ♦ Ultra-Low Power 42mW at fCLK = 22MHz Transceiver Mode 34mW at fCLK = 15.36MHz (Transceiver Mode)

MAX5863

Abstract: MAX5863ETM MAX5865 MAX5865EVKIT 620kH
Contextual Info: 19-2914; Rev 1; 10/03 KIT ATION EVALU E L B AVAILA Ultra-Low-Power, High-Dynamic Performance, 7.5Msps Analog Front End Applications Features ♦ Integrated Dual 8-Bit ADCs and Dual 10-Bit DACs ♦ Ultra-Low Power 22.8mW at fCLK = 7.5MHz Transceiver Mode

Contextual Info: 19-2914; Rev 1; 10/03 KIT ATION EVALU E L B AVAILA Ultra-Low-Power, High-Dynamic Performance, 7.5Msps Analog Front End The ADCs and DACs operate simultaneously or independently for frequency-division duplex FDD and time-division duplex (TDD) modes. A 3-wire serial interface