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    D338 Search Results

    D338 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    SN74CBTD3384DBQR
    Texas Instruments 10-Bit FET Bus Switches With Level Shifting 24-SSOP -40 to 85 Visit Texas Instruments Buy
    SN74CBTD3384PW
    Texas Instruments 10-Bit FET Bus Switches With Level Shifting 24-TSSOP -40 to 85 Visit Texas Instruments Buy
    74CBTD3384CDGVRG4
    Texas Instruments 10-Bit FET Bus Switches With Level Shifting with -2 V Undershoot 24-TVSOP -40 to 85 Visit Texas Instruments Buy
    SN74CBTD3384DGVR
    Texas Instruments 10-Bit FET Bus Switches With Level Shifting 24-TVSOP -40 to 85 Visit Texas Instruments Buy
    SN74CBTD3384DBR
    Texas Instruments 10-Bit FET Bus Switches With Level Shifting 24-SSOP -40 to 85 Visit Texas Instruments Buy
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    D338 Price and Stock

    Samtec Inc

    Samtec Inc FW-20-05-G-D-338-140-A

    Conn Board Stacker HDR 40 POS 1.27mm Solder ST SMD
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    Master Electronics FW-20-05-G-D-338-140-A
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    • 100 $5.48
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    Sager FW-20-05-G-D-338-140-A
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    Samtec Inc MTMM-104-06-G-D-338

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    Master Electronics MTMM-104-06-G-D-338
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    Samtec Inc MTMM-109-06-L-D-338

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    Master Electronics MTMM-109-06-L-D-338
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    Samtec Inc MTMM-116-06-SM-D-338

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    Master Electronics MTMM-116-06-SM-D-338
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    • 10 $6.69
    • 100 $4.88
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    Samtec Inc MTMM-103-14-G-D-338

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    Master Electronics MTMM-103-14-G-D-338
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    D338 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    3Y20

    Contextual Info: SN75186 QUADRUPLE DRIVER/RECEIVER WITH LOOPBACK D3389. FEBRUARY 1990 FN PACKAGE Meets Standards RS-232-C, EIA-232-D, and CCITT V.28 TOP VIEW Four Independent Drivers and Receivers CM O Ü z S I—JI—] L J L J , A 3 2 1 1 LB ] 5 N < Loopback Mode Functionally Self-Tests


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    sn75186d3389rs-232-ceia-232-d+2mil-std-833c3y20 PDF

    Contextual Info: 74ACT11175 QUADRUPLE DĆTYPE FLIPĆFLOP WITH CLEAR ą ą SCAS089 − D3385, DECEMBER 1989 − REVISED APRIL 1993 • • • • • • • • • DW OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Buffered Clock and Direct Clear Inputs Applications Include: Buffer/Storage


    Original
    74act11175scas089d3385500-ma+1300-mil PDF

    Contextual Info: 54AC11175, 74AC11175 QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR T 10109— D3388, DECEMBER 1989— REVISED MARCH 1990 • Applications Include: Buffer/Storage Registers, Shift Registers, Pattern Generators 5 4 A C 11 1 75 . . . J P A C K A G E 74A C 11175 . . . DW O R N PACKAGE


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    54ac1117574ac11175d3388500-ma+1300-mil PDF

    Contextual Info: TLC1550I, TLC1551I Advanced LinEPIC 10-BIT ANALOG-TO-DIGITAL CONVERTERS WITH PARALLEL OUTPUTS D3383, M A Y 1991 N PACKAGE S in g le -P o ly A d v a n c e d Lin E P IC ™ T O P VIEW S ilic o n -G a te 1-um C M O S T e c h n o lo g y • • Po w er D is sip a tio n (Max) . . . 40 mW


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    tlc1550itlc1551i10-bitd3383+16s5303 PDF

    SN751177

    Abstract: 11A1 RS-422-A SN751177NSLE SN751178 QDT1114 D3381
    Contextual Info: 1%11„ SN751177, SN751178 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS _ S L L S 0 5 9 A - D3381, FEBRUARY 1 9 9 0 -R E V IS E D JANUARY 1993 Meets EIA Standards RS-422-A, RS485 SN751177 — N PACKAGE TOP VIEW Meets CCITT Recommendations V.10, V 11 X.26, X.27


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    sn751177sn751178slls059a-d3381+81990-revisedrs-422-ars485of-12vto00t111711a1sn751177nsleqdt1114 PDF

    03389

    Abstract: D3389 A232D BV 726 B A-232-D SN75186
    Contextual Info: SN75186 QUAD DRIVER/RECEIVER WITH LOOPBACK SLLS06BB - D3389. FEBRU ARY 1990 - R EV ISED MARCH 1993 * Meets Standards RS-232-C, EIA-232-D, and CCITT V.28 * Four Independent Drivers and Receivers * Loopback Mode Functionally Self-Tests Drivers and Receivers Without


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    sn75186d3389rs-232-ceia-232-d+5mil-std-833c03389a232dbv 726 ba-232-d PDF

    181-D

    Abstract: 54AC11175 74AC11175 109-D3388
    Contextual Info: 54AC11175, 74AC11175 QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR TI0109— D3388, DECEMBER 1989— REVISED M ARCH 1990 Applications Include: Buffer/Storage Registers, Shift Registers, Pattern Generators 5 4 A C 1 1175 . . . J P ACKA G E 74A C 11 1 75 . . . D W O R N P ACKA G E


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    54ac1117574ac11175ti0109d3388+4500-ma300-mil181-d109-d3388 PDF

    Contextual Info: 74ACT11175 QUADRUPLE D-TYPE FLIP-FLOP WITH CLEAR SCAS089 – D3385, DECEMBER 1989 – REVISED APRIL 1993 • • • • • • • • • DW OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Buffered Clock and Direct Clear Inputs Applications Include: Buffer/Storage


    Original
    74act11175scas089d3385500-ma+1300-mil PDF

    Contextual Info: 74ACT11175 QUADRUPLE DĆTYPE FLIPĆFLOP WITH CLEAR ą ą SCAS089 − D3385, DECEMBER 1989 − REVISED APRIL 1993 • • • • • • • • • DW OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Buffered Clock and Direct Clear Inputs Applications Include: Buffer/Storage


    Original
    74act11175scas089d3385500-ma+1300-mil PDF

    d172d

    Abstract: CAS08
    Contextual Info: 74ACT11175 QUADRUPLE D-TYPE FLIP-FLOP WITH CLEAR _ SCASQ89 - D3385. D E CEM BER 1989 - R E V IS E D APRIL 1933 * Inputs Are TTL-Voltage Compatible * Buffered Clock and Direct Clear Inputs * Applications Include: Buffer/Storage Registers, Shift Registers, Pattern


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    74act11175scasq89d3385500-ma+3300-mild172dcas08 PDF

    74AC11251

    Abstract: D3380
    Contextual Info: 54AC11251, 74AC11251 1-0F-8 DATA SELECTORS/MULTIPLEXERS WITH 3-STATE OUTPUTS TI0139— D3380, DECEMBER 19B9 S4AC11251 . J PACKAGE 74AC11251 . . D OB N PACKAGE TOP VIEW • 3-State Outputs Interface Directly with System Bus • Performs Parallel-to-Serial Conversion


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    54ac1125174ac11251ti0139--d3380+3500-ma300-mils4ac11251 PDF

    74AC11175

    Abstract: 74ACT11175
    Contextual Info: 74ACT11175 QUADRUPLE D-TYPE FLIP-FLOP WITH CLEAR SCAS089 – D3385, DECEMBER 1989 – REVISED APRIL 1993 • • • • • • • • • DW OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Buffered Clock and Direct Clear Inputs Applications Include: Buffer/Storage


    Original
    74act11175scas089d3385500-ma+2300-mil74ac11175 PDF

    74AC11175

    Abstract: 74ACT11175 74ACT11175DW 74ACT11175N D3385
    Contextual Info: 74ACT11175 QUADRUPLE DĆTYPE FLIPĆFLOP WITH CLEAR ą ą SCAS089 − D3385, DECEMBER 1989 − REVISED APRIL 1993 • • • • • • • • • DW OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Buffered Clock and Direct Clear Inputs Applications Include: Buffer/Storage


    Original
    74act11175scas089d3385500-ma+4300-mil74ac1117574act11175dw74act11175n PDF

    Contextual Info: 74ACT11175 QUADRUPLE DĆTYPE FLIPĆFLOP WITH CLEAR ą ą SCAS089 − D3385, DECEMBER 1989 − REVISED APRIL 1993 • • • • • • • • • DW OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Buffered Clock and Direct Clear Inputs Applications Include: Buffer/Storage


    Original
    74act11175scas089d3385500-ma+1300-mil PDF

    D172D

    Contextual Info: 74ACT11175 QUADRUPLE D-TYPE FLIP-FLOP WITH CLEAR S CAS 089 - D3385, D E CEM BER 1989 - REVISED APRIL 1993 • * Inputs Are TTL-Voltage Compatible ■ * Buffered Clock and Direct Clear Inputs I I I DW OR N PACKAGE TOP VIEW * Applications Include: Buffer/Storage


    OCR Scan
    74act11175d33850chm443d172d PDF

    Contextual Info: 74ACT11175 QUADRUPLE DĆTYPE FLIPĆFLOP WITH CLEAR ą ą SCAS089 − D3385, DECEMBER 1989 − REVISED APRIL 1993 • • • • • • • • • DW OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Buffered Clock and Direct Clear Inputs Applications Include: Buffer/Storage


    Original
    74act11175scas089d3385500-ma+1300-mi PDF

    54ACT11828

    Abstract: 74ACT11828
    Contextual Info: 54ACT11828, 74ACT11828 10-BIT BUFFERS/BUS DRIVERS WITH 3-STATE OUTPUTS SCAS092 – D3387, APRIL 1993 • • • • • • • Inputs Are TTL-Voltage Compatible 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Flow-Through Architecture to Optimize


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    54act1182874act1182810-bitscas092+3d3387500-ma300-mil PDF

    54ACT11828

    Abstract: 74ACT11828 DOT4770 Y2227
    Contextual Info: 54ACT11828, 74ACT11828 10-BIT BUFFERS/BUS DRIVERS WITH 3-STATE OUTPUTS SCAS092 - D3387. APRIL 1993 * Inputs A re T TL -V oltag e C o m p atib le 54ACT11828 . . . JT PACKAGE 74ACT11828 . . . OW PACKAGE TOP VIEW f • 3-S tate O utp uts Drive Bus Lines o r Buffer


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    54act1182874act1182810-bitscas092-+6d3387500-ma300-mild0cjm773dot4770y2227 PDF

    Contextual Info: 74ACT11175 QUADRUPLE DĆTYPE FLIPĆFLOP WITH CLEAR ą ą SCAS089 − D3385, DECEMBER 1989 − REVISED APRIL 1993 • • • • • • • • • DW OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Buffered Clock and Direct Clear Inputs Applications Include: Buffer/Storage


    Original
    74act11175scas089d3385500-ma+1300-mil PDF

    Contextual Info: 74ACT11175 QUADRUPLE D-TYPE FLIP-FLOP WITH CLEAR SCAS089 – D3385, DECEMBER 1989 – REVISED APRIL 1993 • • • • • • • • • DW OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Buffered Clock and Direct Clear Inputs Applications Include: Buffer/Storage


    Original
    74act11175scas089d3385500-ma+1300-mil PDF

    D3385

    Abstract: 74AC11175 74ACT11175
    Contextual Info: 74ACT11175 QUADRUPLE D-TYPE FLIP-FLOP WITH CLEAR SCAS089 – D3385, DECEMBER 1989 – REVISED APRIL 1993 • • • • • • • • • DW OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Buffered Clock and Direct Clear Inputs Applications Include: Buffer/Storage


    Original
    74act11175scas089d3385500-ma+2300-mil74ac11175 PDF

    Contextual Info: 54ACT11828, 74ACT11828 10-BIT BUFFERS/BUS DRIVERS WITH 3-STATE OUTPUTS _S C A S 092- D3387, APRIL 1993 • * Inputs Are TTL-Voltage Compatible I I I I * 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers * Flow-Through Architecture to Optimize


    OCR Scan
    54act1182874act1182810-bitd3387+2500-ma300-mil PDF

    RS4S5

    Contextual Info: SN751177, SN751178 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS D3381, MARCH 1980 SN751177 N PA C K A G E TOP VIEW • Meets EIA Standards RS-422-A, RS485 • Meets CCITT Recommendations V.10, V.11.X.26, X.27 • Designed for Multipoint Bus Transmission on Long Bus Lines In Noisy Environments


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    sn751177sn751178d3381rs-422-a+3rs485sn7s1177rs4s5 PDF

    prme

    Abstract: SN100KT5541
    Contextual Info: SN100KT5541 OCTAL ECL-TO-TTL TRANSLATOR WITH 3-STATE OUTPUTS D3384, NOVEMBER 1989-REVISED MAY 1990 OW OR NT PACKAGE 100K Compatible TOP VIEW ECL and TTL Control Inputs Y1[ 1 Y2[ 2 Y3 [ 3 Noninverting Outputs Flow-Through Architecture Optimizes PCB Layout


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    sn100kt5541d33841989-revised300-mil+1prme PDF