D3165 Search Results
D3165 Price and Stock
Nexperia PUMD3,165TRANS PREBIAS 1NPN 1PNP 6-TSSOP |
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PUMD3,165 | Cut Tape | 156,889 | 1 |
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PUMD3,165 | Reel | 210,000 | 8 Weeks | 10,000 |
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PUMD3,165 | 49,367 |
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PUMD3,165 | Reel | 10,000 |
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PUMD3,165 | Reel | 20,000 |
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PUMD3,165 | 10,097 | 10,000 |
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PUMD3,165 | 8 Weeks | 40,000 |
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PUMD3,165 | 10 Weeks | 10,000 |
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PUMD3,165 | 10 Weeks | 10,000 |
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PUMD3,165 | 250,000 | 1 |
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Nexperia PUMD3,115Digital Transistors SOT363 50V .1A NPN/PNP RET |
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PUMD3,115 | 209,644 |
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Nexperia PUMD3,125Digital Transistors SOT363 50V .1A NPN/PNP RET |
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PUMD3,125 | 9,010 |
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Nexperia PUMD3,135Digital Transistors SOT363 50V .1A NPN/PNP RET |
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PUMD3,135 | 3,599 |
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Banner Engineering Corp Q85VR3D (31655)PHOTOELECTRIC SENSOR, DIFFUSE, 250MM, 12-240VDC/24-240VAC, SPDT, TERMINAL, Q85 |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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Q85VR3D (31655) | Bulk | 1 | 7 Weeks | 1 |
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D3165 Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
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Contextual Info: 74AC11286 9-BIT PARITY GENERATOR/CHECKER WITH BUS DRIVER PARITY I/O PORTS _ D3165, AUGUST 1988 - REVISED APRIL 1993 D OR N PACKAGE TOP VIEW * Generates Either Odd or Even Parity for Nine Data Unes * Cascadabie for n-Bits Parity B[ 1 At 2 * Direct Bus Connection for Parity |
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74AC11286 D3165, 500-mA 300-mil | |
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Contextual Info: AUe 9* t. 1991 molate 1 M x 1 DRAM MDM11000-80/10/12/15 Issue 3.0 : Junel 991 Semiconductor Inc. r Pin Definitions Package Type: T,V 1,048,576 x 1 CMOS High Speed Dynamic RAM Features WE Row Access Times of 80,100/120/150 ns 5 Volt Supply ±10% 512 Refresh Cycles 8 ms |
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MDM11000-80/10/12/15 MIL-STD-883C MIL-883 CA92121 | |
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Contextual Info: •B i y m 32KX8 moiaic SRAM MSM832-25/35/45/55/70 Issue 1.0 : June 1992 ADVANCE PRODUCT INFORMATION S e m ic o n d u c t o r Inc. ^Pin Definition 32,768 x 8 CMOS High Speed Static RAM A14 A12 A7 A6 A5 A4 A3 A2 A1 AO DO D1 D2 GND Features Access Times of 35/45/55/70 ns 25 ns in development |
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32KX8 MSM832-25/35/45/55/70 MIL-STD-883D, | |
D3165Contextual Info: ïA " 74AC11286 9-BIT PARITY GENERATOR/CHECKER WITH BUS DRIVER PARITY I/O PORTS D316S, AUGUST 1988 - REVISED APRIL 1933_ logic symbolt PARITY I/O PARITY ERROR t This symbol is In accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. |
OCR Scan |
74AC11286 D316S, D3165 | |
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Contextual Info: 54ACT11238, 74ACT11238 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS TI0069— D3185, NOVEMBER 1988—REVISED MARCH 19 Inputs are TTL-Voltage Compatible 54ACT11238 . . . J PACKAGE 74ACT11238 . . . D OR N PACKAGE Designed Specifically for High-Speed Memory Decoders and Data Transmission |
OCR Scan |
54ACT11238, 74ACT11238 TI0069-- D3185, 1988--REVISED ACT11138 500-mA 300-mil 54ACT11238 T11238 | |
X20CContextual Info: 54AC 11286, 74AC11286 9-BIT PARITY GENERATORS/CHECKERS WITH BUS DRIVER PARITY I/O PORTS T I0 1 19— D 3165, AUGUST 1988— REVISED MARCH 1990 • Generates Either Odd or Even Parity for Nine Data Lines 5 4 A C 1 1286 . . . J P A C K A G E 7 4 A C 11 2 86 . . . 0 O R N P A C K A G E |
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74AC11286 500-mA 300-mil X20C | |
ac11286
Abstract: 74AC11286
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54AC11286, 74AC11286 TI0119â D3165, 500-mA 300-mil AC11286 |