D280 Search Results

Contextual Info: SN54HC804, SN74HC804 HEX 2-INPUT NANO DRIVERS D2804, M ARCH 1 9 8 4 -R E V IS E D SEPTEMBER 1987 High-Current Outputs Can Drive Up to 15 LSTTL Loads SN 54H C804 . . . J PACKAGE S N 7 4 H C 8 0 4 . . . DW OR N PACKAG E T O P V IE W 1A C Dependable Texas Instruments Quality and

SM74HC125

Abstract: HC12S 8112G
Contextual Info: SN54HC125, SN54HC126 SN74HC12S, SN74HC126 QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS D2804, M A R C H 1 9 8 4 - R E V IS E D JU N E 1989 SN54HC125. SN54HC126 . SN74HC125, S N 7 4 H C 1 26 . 'High-Current 3-State Outputs Interface Directly with System Bus or Can Drive Up

S286

Abstract: S2B6
Contextual Info: SN74AS286, SN54AS286 9-BIT PARITY GENERATORS/CHECKER WITH BUS DRIVER PARITY I/O PORT D2808, D E C E M B E R 1983 - R EV ISED M A Y 198« Generates Either Odd or Evan Parity or Nina Data Linas SN54AS286 SN74AS286 Cascadable for n-Bits Parity GC n i T u tH VCC

54HC298

Contextual Info: SN54HC298, SN74HC298 QUADRUPLE 2-INPUT MULTIPLEXER WITH STORAGE D2804. MARCH 1984—REVISED JUNE 1989 SN54HC298 . . . J PACKAGE SN74HC298 . . . N PACKAGE TOP VIEW Dual Source for Operands and Constants In Arithmetic Processor; Can Release Processor Register Files for Acquiring New

74hc804

Contextual Info: SN54HC804, SN74HC804 HEX 2-INPUT NAND DRIVERS VISED SEPTEMBER 1987 D2804, M ARCH 1 SN54HC8M ;r V ^ A C K A G E High-Current Outputs Can Drive Up to 15 SN 74HC804 . LSTTL Loads N PACKAGE TOP VIEW / ' > a 1 L720] C IB C 2 i y : 3 19 4 17 26 C 5 16 2Y C 6 15

Contextual Info: TEXAS INSTR LOGIC 25E D • A1bl723 □ □ a f 3 f l2 H 2 ■ SN54HCT563, SN74HCTS63 OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS D2804, MARCH 1984-REVISED SEPTEMBER 1987 Inputs are TTL-Voltage C om patible High-C urrent 3-S tate O u tp u t Drive Bus-Lines

T634

Contextual Info: TEXAS INSTR LOGIC 2SE D 3=1(31723 DOabflQM 7 SN54HCT534, SN74HCT534 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS D2804, MARCH 1984-REVISEO SEPTEMBER 1987 Inputs are TTL-Voltage Compatible SN 54H C T634 . . . J PACKAGE SN 74H C T534 . . . DW OR N PACKAGE

HC238

Abstract: SN74HC238
Contextual Info: SN54HC238, SN74HC238 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS D2804, M A R C H 1 9 8 4 -R E V IS E D JUNE 1989 • Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems I I • Incorporates 3 Enable Inputs to Simplify Cascading and/or Data Reception

SN74HCT

Abstract: SN54HCT241 HCT240 HCT241 SN54HCT240 SN74HCT240
Contextual Info: SN54HCT240, SN54HCT241, SN74HCT240, SN74HCT241 OCTAL BUFFERS AND LINE DRIVERS CMOS LOGIC WITH 3-STATE OUTPUTS D2804, MARCH 1 984 —REVISED JUNE 1989 S N 5 4 H C T ' . . . J PACKAGE S N 7 4 H C T ' . . . D W OR N PACKAGE Inputs are TTL-Voltage Compatible •

SN74HC09

Abstract: SN54HC09 V6-13 SN74HC09D
Contextual Info: SN54HC09, SN74HC09 QUADRUPLE 2 INPUT POSITIVE-AND GATES WITH OPEN-DRAIN OUTPUTS D2804, M A R C H 1984 - REVISED SEPTE M B E R 1987 Package Options Include Plastic "Sm all Outline" Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-m il DIPs

8D-18

Abstract: SI54H 74HCT534 HCT374 sJ16
Contextual Info: SN54HCT534, SN74HCT534 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS D2804, MARCH 1 9 8 4 - REVISED SEPTEMBER 1987 S N 5 4 H C T 5 3 4 . . . J P AC KA G E S N 7 4 H C T 5 3 4 . . . D W OR N P AC KA G E High-Current 3-State Inverting Outputs Can

8D-13

Abstract: SN54HCT574 SN74HCT574
Contextual Info: SN54HCT574, SN74HCT574 OCTAL D-TYPE EDGE TRIGGERED FLIP FLOPS WITH 3-STATE OUTPUTS D2804, MARCH 1984-REVISED SEPTEMBER 1987 • Inputs are TTL-Voltage Compatible • High-Current 3-State Noninverting Outputs Drive Bus-Lines Directly or Up to 15 LSTTL Loads

Contextual Info: SN54HCT534, SN74HCT534 O C TAL D T Y P E EDGE TRIGGERED FLIP-FLOPS W ITH 3-STATE OUTPUTS D2804, MARCH 1984—REVISED SEPTEMBER 1987 Inputs are TTL-Voltage Compatible High-Current 3-State Inverting Outputs Can Drive Up to 15 LSTTL Loads TOP VIEW Package Options Include Plastic "Small

54HC238

Abstract: 74HC238
Contextual Info: SN 54H C238, SN 74H C238 •LINE TO 8 LINE DECODERS/DEM ULTIPLEXERS D2804, MARCH 1984-REVISED JUNE 1989 * Designed Specifically for High-Speed Memory Decoders and Data Transm ission System s SN 54H C236 . . . J PACKAGE f • • • SN 74H C238 . . . D* OR N PACKAGE

SN64HCT

Abstract: 74HCT645
Contextual Info: SN54HCT640, SN54HCT643, SN54HCT645 SN74HCT640, SN74HCT643, SN74HCT645 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS D2804, MARCH 1984-HEVISED SEPTEMBER 1987 Inputs are TTL-Voltage Compatible SN64HCT' . . . J PACKAGE SN74HCT' . . . DW on N PACKAGE Choice of True or Inverting Logic

SN54HC

Contextual Info: SIU54HCT240, SN54HCT241, SN74HCT240, SN74HCT241 OCTAL BUFFERS AND LINE DRIVERS CMOS LOGIC WITH 3 STATE OUTPUTS D2804, MARCH 1984-REVISED SEPTEMBER 1987 S N 5 4 H C T ' . . . J P A C KA G E S N 7 4 H C T ' . . . DW OR N P A C K A G E • Inputs are TTL-Voltage Compatible

SN75438

Abstract: D2806
Contextual Info: SN75436, SN75437A, SN75438 QUADRUPLE PERIPHERAL DRIVERS SLRS019 - D2806, DECEMBER 1986 Saturating Outputs With Low On-State Resistance Hlgh-lmpedance Inputs Compatible With CMOS, MOS, and TTL Levels Very Low Standby Power. . . 21 mW Max High-Voltage Outputs. . . 70 V Min

74HCT238

Abstract: t238
Contextual Info: SN54HCT238, SN74HCT238 3 LINE TO 8 LINE DECODERS/DEMULTIPLEXERS D2804, MAflCH 1 9 8 4 - REVISED JUNE 1989 • Inputs are TTL-Voltage Compatible • Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems S N 5 4 H C T 2 3 8 . . . J P AC KA G E

4078A

Contextual Info: SN54HC4078A, SN74HC4078A 8 INPUT ORfNOR GATE D2804, MARCH 1984-REVISED SEPTEMBER 1987 Package Options Include Plastic "Small Outline" Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPS SN 54H C 4078A . . . J PACKAGE S N 74H C 4078A

Contextual Info: SN54HCT640, SN54HCT643, SN54HCT645 SN74HCT640, SN74HCT643, SN74HCT645 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS D2804, MARCH 1984-REVISED SEPTEMBER 1987 Inputs are TTL-Voltage Compatible SN54HCT’ . . . J PACKAGE SN74HCT' . . . OW OR N PACKAGE Choice of True or Inverting Logic

Contextual Info: SN54HC604, SN74HC604 OCTAL 2-INPUT MULTIPLEXED LATCHES WITH 3-STATE OUTPUTS D2804, MARCH 1984-REVISED SEPTEMBER 1987 ^N 54H C 604 SN 74H C604 High-Current 3-State Outputs Can Drive Up to 15 LSTTL Loads l / j PACKAGE ACKAGE TOP*VIEW • Application-Oriented for Maximum Speed

HCT238

Abstract: SN54HCT238 SN74HCT238
Contextual Info: SN54H CT238, SN74H CT238 LINE TO 8-LINE DECODERS/DEMULTIPLEXERS D2804. MARCH 1984-REVISED JUNE 1989 • Inputs are TTL-Voltage Compatible • Designed Specifically for High-Speed Mem ory Decoders and Data Transmission Systems • • {TO P V IE W A C Incorporates 3 Enable Inputs to Simplify

LV 20-P

Abstract: SN54HC05 SN74HC05
Contextual Info: SN54HC05, SN74HC05 HEX INVERTERS WITH OPEN-DRAIN OUTPUTS D2804, MARCH 1984-REVISED SEPTEMBER 1987 Package Options Include Plastic "Sm all O utline" Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-m il DIPs S N 5 4 H C 0 5 . . . J P AC KA G E

54HCT373

Abstract: 74HCT373D
Contextual Info: SNS4HCT373, SN74HCT373 OCTAL D TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS D2804, MARCH 1 9 8 4 - REVISED SEPTEMBER 1987 SN 54H CT373 . . . J PACKAG E SN 74H CT373 D W OR N P A C K A G E 8 High-Current Latches in a Single Package • High-Current 3-State True Outputs Can