D 4555 Search Results

4556B

Abstract: demultiplexer truth table 4000B 4555B Scans-0017243 4556B fairchild
Contextual Info: 4555B • 4556B DUAL l-O F -4 DECODERS/DEMULTIPLEXERS D E S C R IP T IO N — T h e 4 5 5 5 B and 4 5 5 6 B are D u a l 1 -o f-4 D e c o d e rs /D e m u ltip le x e rs . E ach d e c o d e r/ d e m u lt ip le x e r has t w o A d d re ss In p u ts A g , A ^ j , an a c tiv e L O W E n a b le I n p u t (E ) a n d f o u r m u tu a lly

Contextual Info: 4555B • 4556B DUAL l-OF-4 DECODERS/DEMULTIPLEXERS D E S C R IP T IO N — T h e 4 5 5 5 B a nd 4 5 5 6 B are D u a l 1 -o f-4 D e c o d e rs /D e m u ltip le x e rs . E ach d e c o d e r/ d e m u lt ip le x e r has t w o A d d re s s In p u ts A q , A ^ j , an a c tiv e L O W E n a b le I n p u t (E ) a nd f o u r m u t u a lly

VEB mikroelektronik

Abstract: MQE10 DL8640DC C41dc 4580d DS2510DC VEB Kombinat analoge schaltkreise VEB M ik ro e le k tro n ik c520d
Contextual Info: Neuheiten Weiterentwicklungen 1989 veb kombinat mikroelektronik Inhaltsverzeichnis Analoge Schaltkreise für die Konsumgüterelektronik H e rs te lle A 4555 D M u lti s t a n d a r d d e k o d e r f ü r P A L , SE C A M u n d N T S C 3 A 4565 D S ig n a l v e r s t e i l e r u n g s - u n d V e r z ö g e r u n g s s c h a ltu n g

Contextual Info: LL817E0PS ‘ON B REV. ON i M V d Q # # m n SECT. A-A SECT. B-B SECT. D ON DATE k NO. ft & M D E S C R I P T I ON m DR. 18. Feb.2000 4561 4 R E V IS E D D IM E N S IO N 24. Feb.2000 45555 CHENGED FORM 3. O c t . 2 0 0 0 46931 CHANGED M A T E R IA L 21. Feb.2002

GD4555B

Abstract: GD4556B 45560 gd4556 45558
Contextual Info: GOLDSTAR TECHNOLOGY 4 0 2 8 7 5 7 GOLDSTAR TECHNOLOGY INCn IN C . D4E D | 4D2fl7S7 DDDlflll 04E 01811 D T-61-n-Sl GD4555B • GD4556B DUAL l-OF-4 DECODERS/DEMULTIPLEXERS D ESCRIPTIO N - The 4555B and 4556B are Dual 1-of-4 Decoders/Demultiplexers. Each decoder/

tt 2246

Abstract: Transistor TT 2246 45558 4555B 4556B 4556 A 8 PIN
Contextual Info: g? COS/MOS U A A IU n C INTEGRATED C IR C U IT S 4Sò6 h Ä JCCCD S D U A L B IN A R Y TO 1 OF 4 D E C O D E R /D E M U L T IP L E X E R S : 4555B O U TPU TS H IG H ON S ELEC T 4556B O U TPU TS LOW ON S ELE C T • E X P A N D A B L E W IT H M U L T IP L E PACKAGES

retriggerable monostable 40106

Abstract: SCAD001D 4011BE sn74 series TTL logic gates list ic HC 4066 AG SN74368A CD4000 SERIES BOOK SDAD001 SN 74 ABT H 16 2 224 A DGG R nobel tv circuit
Contextual Info: SN54ABT377, SN74ABT377A OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLOCK ENABLE SCBS156E – FEBRUARY 1991 – REVISED JANUARY 1997 D D D D SN54ABT377 . . . J OR W PACKAGE SN74ABT377A . . . DB, DW, N, OR PW PACKAGE TOP VIEW CLKEN 1Q 1D 2D 2Q 3Q 3D 4D 4Q

MC14555B

Abstract: TC4555BP MSM4555 M4555BP HEF4555BP 4555B CD4555B HD14555B MC14556B MSM4555BRS
Contextual Info: 19 1 - - 4555B Dual B in a ry to 1 of 4 D ecoder/D em ultiplexer A c tiv e High O u tp u ts um m n »»/ ¿7 • A X-h ^ A. mm r^ - y 2h' v h it'-y b 3X t - b &L 4 * - 7 )l L ‘° — d> 4 > ’ Eliminated 1of MC14555B a z j "/ + > r m •T O ~ y / T ~ ?

TRANSISTOR PHL 7P

Abstract: 4556BT IC 4556
Contextual Info: s G S-TH<mSON 07C D I 7 ^ 5 3 7 7929225 001503^ 0 | S G S SEMICONDUCTOR CÛRP ÎT i t e n D A T C n IN T E G R A T E D C IR C U IT S ^ f p e p HCC/HCF 4555B \\ h c c /h c f 4556B i . -I DUAL B IN A RY TO 1 OF 4 DECODER/DEM ULTIPLEXERS: 4555B OUTPUTS HIGH ON SELECT

Contextual Info: Prelim inary Inform ation AM D-K6-2 Processor Data Sheet AM DÎ1 1999 Advanced Micro Devices, Inc. All rights reserved. T h e c o n t e n t s o f t hi s d o c u m e n t a r e p r o v i d e d in c o n n e c t i o n w i t h A d v a n c e d Mi c r o D e v i c e s , I nc. " A M D " p r o d u c t s . A M D m a k e s no r e p r e s e n t a t i o n s or w a r r a n t i e s wi t h

Truth table of 1 to 16 demultiplexer

Contextual Info: HEF4555B MSI DUAL 1-OF-4 DECODER/DEMULTIPLEXER T he H E F 4555B is a dual 1-of-4 d e co d e r/d e m u ltip le xe r. Each has tw o address in p u ts A g and A -| , an active LOW enable in p u t (E) and fo u r m u tu a lly exclusive o u tp u ts w h ich are active H IG H (Oo to O 3 ).

hef4555

Contextual Info: HEF4555B MSI DUAL 1-0F-4 DECODER/DEMULTIPLEXER T he H E F 4555B is a dual 1-of-4 d e co d e r/d e m u ltip le xe r. Each has tw o address in p u ts A g and A -| , an active LOW enable in p u t (E) and fo u r m u tu a lly exclusive o u tp u ts w h ich are active H IG H (Oo to O 3 ).

IRGDDN600M06

Abstract: power mosfet 600v 600A IRGRDN600M06 mosfet 600V 600A circuit
Contextual Info: International S Rectifier Provisional Data Sheet P D -9 .1176 IRGDDN600M06 IRGRDN600MQ6 "SINGLE SWITCH" IGBT DOUBLE -A-PAK Low conduction loss IGBT IR G D D . IR G R D . ? • Rugged Design • Simple gate-drive •Switching-Loss Rating includes all "tail"

Contextual Info: R&E 4555B 4556B INTERNATIONAL, INC. CMOS DUAL 2-T0-4 LINE DECODERS FEATURES ♦ Buffered Outputs ♦ Selected Output Active High 4555B or Active Low (45S6B) Expandable ♦ CONNECTION D IA G R A M (all packages) Vd d I 16 DESCRIPTION The 4555 B and 4556B are constructed

74HC octal bidirectional latch

Abstract: SN74368A cd4536 cmos ALL 4000- 4001- 4002 TO 4099 series IN MOTOROLA DTL Logic SCAD001 CD4000 SERIES BOOK ic 4511 decoder ttl SCED008B SN74ABT573
Contextual Info: SN54ABT640, SN74ABT640 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS104C – FEBRUARY 1991 – REVISED JANUARY 1997 D D D D SN54ABT640 . . . J PACKAGE SN74ABT640 . . . DB, DW, N, OR PW PACKAGE TOP VIEW DIR A1 A2 A3 A4 A5 A6 A7 A8 GND 1 20 2 19 3 18 4

CD4000 SERIES BOOK

Abstract: philips 18504 sn 16861 SN74368A ci ttl sn74ls00 sn74 series TTL logic gates list IC CD 4033 pin configuration CD74AC374 SCBD001B cmos ALL 4000- 4001- 4002 TO 4099 series IN MOTOROLA
Contextual Info: SN54ABT623A, SN74ABT623 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS114D – FEBRUARY 1991 – REVISED MAY 1997 D D D D SN54ABT623A . . . JT OR W PACKAGE SN74ABT623 . . . DB, DW, N, OR PW PACKAGE TOP VIEW OEAB A1 A2 A3 A4 A5 A6 A7 A8 GND 1 20 2 19 3

A102

Abstract: APM4358KP STD-020C APM43 APM4358
Contextual Info: APM4358KP N-Channel Enhancement Mode MOSFET Pin Description Features D • D 30V/80A, D D RDS ON = 2.3mΩ (typ.) @ VGS = 10V S S RDS(ON) = 4.3mΩ (typ.) @ VGS = 4.5V • • • • S G Super High Dense Cell Design Avalanche Rated Top View of KPAK Reliable and Rugged

Contextual Info: Integrated CIRCUITS Ass6h j g S S L DUAL B IN A RY TO 1 OF 4 DECODER/DEMULTIPLEXERS: 4555B OUTPUTS HIGH ON SELECT 4556B OUTPUTS LOW ON SELECT • • • E X P A N D A B L E W IT H M U L T IP L E P A C K A G E S S T A N D A R D , S Y M M E T R IC A L O U T P U T C H A R A C T E R IS T IC S

Contextual Info: Provisional Data Sheet No. PD - 9.887B International IS R Recti fier R E P E T IT IV E A V A L A N C H E A N D d v /d t R A T E D IRHM7054 IRHM8054 JANSR2N7394 JANSH2N7394 [REF: MIL-PRF-19500/603] N -C H A N N E L HEXFET TRANSISTOR M E G A R A D HARD 60Volt, 0.03£1, MEGA RAD HARD HEXFET

Contextual Info: 1 -0 0 I D IS T o D R A W IN G M A D E IN T H IR D A N G L E P R O JE C T IO N R E V IS IO N S C o p y r ig h t 19 b y A M P In c o r p o r a t e d , H a r r is b u r g , P a. A l l I n t e r n a t i o n a l R ig h t s R e s e r v e d , A M P I n c o r p o r a t e d p r o d u c t s

TE 555-4

Contextual Info: 7 THIS DRAWING IS UNPUBLISHED. COPYRIGHT - 6 5 RELEASED FOR PUBLICATION loc By - R E V IS IO N S d is t AD 00 ALL RIGHTS RESERVED. • —P“1 ETR A4 8.1 3 I DESCRIPTION REVISED PER I DÂfË ECO-12-003255 I DWN I APVD KH 14M AR12 JO [.320] D D 1.27 /r /r

Contextual Info: M7E D INTECRATED DEVICE • 4Ô25771 D 0 Q c17bQ 1 * I D T CMOS DUAL-PORT RAM 16K 2K x 8-BIT WITH INTERRUPTS In te g ra te d Device Technology, In c. FEATURES: IDT71321SA/LA IDT71421SA/LA DESCRIPTION: • High-speed access T h e 1D T71321/ID T71421 are high-speed 2 K x 8 dual­

Contextual Info: Pomona 1 M o cl A Pnne 1 M o d AL-B to 1613 A L-B Alpha Numerical Index; Pane 1 M o d t 1658 to 2400 Page 1 M o d e l 2401 to 2BC-PP Page 1 M o d e l 3014 to 3491 P age 1 3533 to 3839 .54 1658 .35

Tri-State Buffer CMOS

Abstract: NJU6342 NJU6342H NJU6342XC NJU6342XE 780Q
Contextual Info: N J TR I-STATE Series PACKAGE OUTLINE O NJU6342XC NJU6342XE PIN CONFIGURATION/PAD LOCATION 4.0~6.0V 120MHz equivalent 2 1 8 □ □ □ CONT C x t 1 C 2 8 □ V| D 7 unc + D □ 3 4 a 5 NCC 3 6 D V "C 5 D F o. t CHIP/EMP 8 LINE-UP TABLE VERSION 2 BUFFER GENERAL DESCRIPTION