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CYI9530 Datasheets (2)

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Silicon Laboratories

Part	ECAD Model	Manufacturer	Description	Datasheet Type	PDF	PDF Size	Page count
CYI9530ZXC		Silicon Laboratories	Clock/Timing - Clock Generators, PLLs, Frequency Synthesizers, Integrated Circuits (ICs), IC CLOCK GEN PCIX BUFF 48TSSOP	Original	PDF		10
CYI9530ZXCT		Silicon Laboratories	Clock/Timing - Clock Generators, PLLs, Frequency Synthesizers, Integrated Circuits (ICs), IC CLOCK GEN PCIX BUFF 48TSSOP	Original	PDF		10

CYI9530 Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
C9530 Abstract: IMIC9530CT IMIC9530CY IMIC9530CYT Contextual Info: C9530 PCIX I/O System Clock Generator with EMI Control Features Table 1. Test Mode Logic Table[1] Features • Dedicated clock buffer power pins for reduced noise, crosstalk and jitter Input Pins OEA SA1 Output Pins SA0 CLKA • Input clock frequency of 25 MHz to 33.3 MHz	Original	c9530 25-mhz imic9530ct imic9530cy +1imic9530cyt	PDF
Contextual Info: CLOCK AND OSCILLATOR PRODUCT SELECTOR GUIDE SPRING 2013 SP RING 2 013 Clocks and oscillators for communications, computing and consumer applications www.silabs.com/timing Engineering for a mixed-signal world. 2 / C L O C K A N D O S C I L L AT O R S E L E C T O R	Original		PDF
C9530 Abstract: IMIC9530CT IMIC9530CY IMIC9530CYT CYI9530 Contextual Info: C9530 PCIX I/O System Clock Generator with EMI Control Features Table 1. Test Mode Logic Table[1] Features • Dedicated clock buffer power pins for reduced noise, crosstalk and jitter Input Pins OEA SA1 Output Pins SA0 CLKA • Input clock frequency of 25 MHz to 33.3 MHz	Original	c9530 25-mhz imic9530ct imic9530cy +2imic9530cyt cyi9530	PDF
Contextual Info: C9530 PCIX I/O System Clock Generator with EMI Control Features Table 1. Test Mode Logic Table[1] Features • Dedicated clock buffer power pins for reduced noise, crosstalk and jitter Input Pins OEA SA1 Output Pins SA0 CLKA • Input clock frequency of 25 MHz to 33.3 MHz	Original	c9530	PDF
cyi9530 Abstract: C9530 IMIC9530CT IMIC9530CY IMIC9530CYT cyi9530zxc Contextual Info: C9530 PCIX I/O System Clock Generator with EMI Control Features Table 1. Test Mode Logic Table[1] Features • Dedicated clock buffer power pins for reduced noise, crosstalk and jitter Input Pins OEA Output Pins SA1 SA0 CLKA • Input clock frequency of 25 MHz to 33.3 MHz	Original	c9530 cyi9530 imic9530ct imic9530cy +2imic9530cyt cyi9530zxc	PDF