CY7C376 Search Results

features cypress flash 370

Abstract: logic block diagram of cypress flash 370 device cypress flash 370 device cypress flash 370 cypress flash 370 technology cypress FLASH370 device cypress quickpro II cypress flash 370 device technology
Contextual Info: F la s h 3 7 0 T0 CYPRESS — Low-cost, text-based design tool, PLD compiler — IEEE 1076-compliant VHDL — Available on PC and Sun platforms • Warp3m CAE development system — VHDL input — ViewLogic graphical user interface — Schematic capture ViewDraw

Contextual Info: FLASH370 PLD Family PRELIMINARY CYPRESS SEMICONDUCTOR • W a rp 2 — Low-cost, text-based design tool, PLD compiler — IEEE 1076-compliant VHDL — Available on PC and Sun platforms • Warp3 ™ CAE development system — VHDL input — ViewLogic graphical user interface

Contextual Info: Revision: Wednesday, December 23,1992 MAR IM 2 3 1993 ADVANCED INFORMATION . V «! CYPRESS SEMICONDUCTOR 256-Macrocell Flash PLD Features Functional Description • 256 macrocells in 16 logic blocks • 128 I/O pins • 6 dedicated inputs including 4 clock

cy7c376

Contextual Info: Revision: Wednesday, December 23,1992 S7E D • ODOROSE 147 CY PRE SS S E M I C O N D U C T O R ADVANCED INFORMATION oypppcq 256-Macrocell Flash PLD SEMICONDUCTOR Features Functional Description • 256 macrocells in 16 logic blocks • 128 I/O pins • 6 dedicated inputs including 4 clock

architecture of cypress CY7C370 cpld

Abstract: CY7C371 max7000 CY7C372 CY7C374 FLASH370 architecture of cypress FLASH370 cpld cypress FLASH370 device cy7c376 CY7C371-2
Contextual Info: The FLASH370 t t Family Of CPLDs and Designing with Warp2 This application note covers the following topics: logic devices CPLDs , (2) an overview of the CY7C370 family of CPLDs, and (3) using the Warp2 Logic Logic Block Block Programmable Interconnect Matrix

Contextual Info: F lash 3 7 0 Wf • Flash erasable CMOS CPLDs • High density — 3 2 —256 macrocells — 3 2 -1 9 2 I/O pins — M ultiple clock pins • Warp2 — Low-cost, text-based design tool. PLD compiler — IEEE 1076-compliant VHDL — Available on PC and Sun platforms

Contextual Info: ADVANCED INFORMATION f CYPRESS SEMICONDUCTOR 256-Macrocell Flash PLD Features Functional Description • 256 macrocells in 16 logic blocks T he CY 7C376 is a Flash E rasable Pro­ gram m able Logic D evice E P L D and is p a rt o f th e FLA SH 370 family o f high-density, high-speed PLD s. Like all m em bers of