CY7C1413BV18 Search Results

CY7C1413BV18 Datasheets (4)

Part	ECAD Model	Manufacturer	Description	Datasheet Type	PDF	PDF Size	Page count
CY7C1413BV18		Cypress Semiconductor	36-Mbit QDR-II SRAM 4-Word Burst Architecture	Original	PDF	1.67MB	28
CY7C1413BV18		Cypress Semiconductor	36-Mbit QDR-II SRAM 4-Word Burst Architecture	Original	PDF	1.67MB	28
CY7C1413BV18-200BZC		Cypress Semiconductor	36-Mbit QDR -II SRAM 4-Word Burst Architecture	Original	PDF	459.55KB	30
CY7C1413BV18-250BZC		Cypress Semiconductor	Memory, Integrated Circuits (ICs), IC SRAM 36MBIT 250MHZ 165FBGA	Original	PDF		30

CY7C1413BV18 Price and Stock

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Infineon Technologies AG CY7C1413BV18-250BZC IC SRAM 36MBIT PAR 165FBGA
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	CY7C1413BV18-250BZC	Tray				1 - 10 - 100 - 1000 - 10000 -	Buy Now
Infineon Technologies AG CY7C1413BV18-200BZC IC SRAM 36MBIT PARALLEL 165FBGA
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	CY7C1413BV18-200BZC	Tray				1 - 10 - 100 - 1000 - 10000 -	Buy Now
Rochester Electronics LLC CY7C1413BV18-200BZC IC SRAM 36MBIT PARALLEL 165FBGA
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	CY7C1413BV18-200BZC	Tray			8	1 - 10 $42.38 100 $42.38 1000 $42.38 10000 $42.38	Buy Now
Rochester Electronics LLC CY7C1413BV18-250BZC IC SRAM 36MBIT PAR 165FBGA
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	CY7C1413BV18-250BZC	Tray			7	1 - 10 $46.43 100 $46.43 1000 $46.43 10000 $46.43	Buy Now
Cypress Semiconductor CY7C1413BV18-250BZC CY7C1413BV18-250BZC
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Verical ()	CY7C1413BV18-250BZC		437		25	1 - 10 - 100 $53.01 1000 $47.42 10000 $44.64	Buy Now
	CY7C1413BV18-250BZC		37		25	1 - 10 - 100 $53.01 1000 $47.42 10000 $44.64	Buy Now
Rochester Electronics	CY7C1413BV18-250BZC		474		1	1 - 10 - 100 $42.41 1000 $37.94 10000 $35.71	Buy Now

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CY7C1413BV18 Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
CY7C1411BV18 Abstract: CY7C1413BV18 CY7C1415BV18 CY7C1426BV18 Contextual Info: CY7C1411BV18, CY7C1426BV18 CY7C1413BV18, CY7C1415BV18 36-Mbit QDR -II SRAM 4-Word Burst Architecture Features Configurations • Separate independent read and write data ports ❐ Supports concurrent transactions ■ 300 MHz clock for high bandwidth ■	Original	CY7C1411BV18, CY7C1426BV18 CY7C1413BV18, CY7C1415BV18 36-Mbit CY7C1411BV18 CY7C1413BV18 CY7C1411BV18 CY7C1413BV18 CY7C1415BV18 CY7C1426BV18	PDF
CY7C1411BV18 Abstract: CY7C1413BV18 CY7C1415BV18 CY7C1426BV18 Contextual Info: CY7C1411BV18, CY7C1426BV18 CY7C1413BV18, CY7C1415BV18 36-Mbit QDR -II SRAM 4-Word Burst Architecture Features Configurations • Separate independent read and write data ports ❐ Supports concurrent transactions ■ 300 MHz clock for high bandwidth ■	Original	CY7C1411BV18, CY7C1426BV18 CY7C1413BV18, CY7C1415BV18 36-Mbit CY7C1411BV18 CY7C1413BV18 CY7C1411BV18 CY7C1413BV18 CY7C1415BV18 CY7C1426BV18	PDF
Contextual Info: CY7C1413BV18 CY7C1415BV18 36-Mbit QDR II SRAM 4-Word Burst Architecture 36-Mbit QDR® II SRAM 4-Word Burst Architecture Features • JTAG 1149.1 compatible test access port ■ Delay Lock Loop DLL for accurate data placement ■ Separate independent read and write data ports	Original	CY7C1413BV18 CY7C1415BV18 36-Mbit	PDF
Contextual Info: CY7C1413BV18 CY7C1415BV18 36-Mbit QDR II SRAM 4-Word Burst Architecture Features Configurations • Separate independent read and write data ports ❐ Supports concurrent transactions CY7C1413BV18 – 2M x 18 ■ 300 MHz clock for high bandwidth ■ 4-word burst for reducing address bus frequency	Original	CY7C1413BV18 CY7C1415BV18 36-Mbit CY7C1413BV18	PDF
CY7C1411BV18 Abstract: CY7C1413BV18 CY7C1415BV18 CY7C1426BV18 Contextual Info: CY7C1411BV18 CY7C1426BV18 CY7C1413BV18 CY7C1415BV18 PRELIMINARY 36-Mbit QDR -II SRAM 4-Word Burst Architecture Features Functional Description • Separate Independent Read and Write data ports — Supports concurrent transactions • 300-MHz clock for high bandwidth	Original	CY7C1411BV18 CY7C1426BV18 CY7C1413BV18 CY7C1415BV18 36-Mbit 300-MHz CY7C1411BV18 CY7C1413BV18 CY7C1415BV18 CY7C1426BV18	PDF
Contextual Info: CY7C1413BV18 CY7C1415BV18 36-Mbit QDR II SRAM 4-Word Burst Architecture 36-Mbit QDR® II SRAM 4-Word Burst Architecture Features • JTAG 1149.1 compatible test access port ■ Delay Lock Loop DLL for accurate data placement ■ Separate independent read and write data ports	Original	CY7C1413BV18 CY7C1415BV18 36-Mbit	PDF