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    CY7C1315A Search Results

    CY7C1315A Datasheets (4)

    Part ECAD Model Manufacturer Description Datasheet Type PDF PDF Size Page count
    CY7C1315AV18
    Cypress Semiconductor 18-Mb QDR -II SRAM 4-Word Burst Architecture Original PDF 328.89KB 22
    CY7C1315AV18-167BZC
    Cypress Semiconductor 18-Mb QDR -II SRAM 4-Word Burst Architecture Original PDF 328.89KB 22
    CY7C1315AV18-200BZC
    Cypress Semiconductor 18-Mb QDR -II SRAM 4-Word Burst Architecture Original PDF 328.89KB 22
    CY7C1315AV18-250BZC
    Cypress Semiconductor 18-Mb QDR-II SRAM 4-Word Burst Architecture Original PDF 330.48KB 22
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    CY7C1315A Price and Stock

    Cypress Semiconductor

    Cypress Semiconductor CY7C1315AV18167BZC

    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Bristol Electronics CY7C1315AV18167BZC 716
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    Cypress Semiconductor CY7C1315AV18-250BZC

    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Bristol Electronics CY7C1315AV18-250BZC 18
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    CY7C1315A Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    CY7C1311AV18

    Abstract: CY7C1313AV18 CY7C1315AV18
    Contextual Info: CY7C1311AV18 CY7C1313AV18 CY7C1315AV18 PRELIMINARY 18-Mb QDR -II SRAM 4-Word Burst Architecture Features Functional Description • Separate Independent Read and Write Data Ports — Supports concurrent transactions • 250-MHz Clock for High Bandwidth • 4-Word Burst for reducing address bus frequency


    Original
    CY7C1311AV18 CY7C1313AV18 CY7C1315AV18 18-Mb 250-MHz CY7C1311AV18/CY7C1313AV18/CY7C1315AV18 CY7C1311AV18 CY7C1313AV18 CY7C1315AV18 PDF

    CY7C1311AV18

    Abstract: CY7C1313AV18 CY7C1315AV18
    Contextual Info: CY7C1311AV18 CY7C1313AV18 CY7C1315AV18 PRELIMINARY 18-Mb QDR -II SRAM 4-Word Burst Architecture Features Functional Description • Separate Independent Read and Write Data Ports — Supports concurrent transactions • 250-MHz Clock for High Bandwidth • 4-Word Burst for reducing address bus frequency


    Original
    CY7C1311AV18 CY7C1313AV18 CY7C1315AV18 18-Mb 250-MHz CY7C1311AV18/CY7C1313AV18/CY7C1315AV18 CY7C1311AV18 CY7C1313AV18 CY7C1315AV18 PDF

    CY7C1298A

    Abstract: GVT7164C18
    Contextual Info: 298A CY7C1298A/ GVT7164C18 64K x 18 Synchronous Burst RAM Pipelined Output Features • • • • • • • • • • • • • • • • • • • The CY7C1298A/GVT7164C18 SRAM integrates 65536x18 SRAM cells with advanced synchronous peripheral circuitry


    Original
    CY7C1298A/ GVT7164C18 CY7C1298A/GVT7164C18 65536x18 CY7C1315A CY7C1298A CY7C1298A GVT7164C18 PDF

    CY7C1338-100AXC

    Abstract: gvt7164d32q-6 CY7C1049BV33-12VXC CY7C1363C-133AC CY7C1021DV33-12ZXC CY7C1460AV25-200AXC CY7C1338G-100AC CY7C1041V33-12ZXC CY7C1460V33-200AXC CY7C1021DV33-10ZXC
    Contextual Info: CYPRESS / GALVANTECH # - Connect pin 14 FT pin to Vss CY7C1019BV33-15VC GS71108AJ-12 & - Does not support 1.8V I/O CY7C1019BV33-15VXC GS71108AGJ-12 * - Tie down extra four I/Os with resistor CY7C1019BV33-15ZC GS71108ATP-12 CY7C1019BV33-15ZXC GS71108AGP-12


    Original
    CY7C1019BV33-15VC GS71108AJ-12 CY7C1019BV33-15VXC GS71108AGJ-12 CY7C1019BV33-15ZC GS71108ATP-12 CY7C1019BV33-15ZXC GS71108AGP-12 CY7C1019CV33-10VC GS71108AJ-10 CY7C1338-100AXC gvt7164d32q-6 CY7C1049BV33-12VXC CY7C1363C-133AC CY7C1021DV33-12ZXC CY7C1460AV25-200AXC CY7C1338G-100AC CY7C1041V33-12ZXC CY7C1460V33-200AXC CY7C1021DV33-10ZXC PDF

    CY7C1298A

    Abstract: GVT7164C18
    Contextual Info: 298A CY7C1298A/ GVT7164C18 64K x 18 Synchronous Burst RAM Pipelined Output Features • • • • • • • • • • • • • • • • • • • The CY7C1298A/GVT7164C18 SRAM integrates 65536x18 SRAM cells with advanced synchronous peripheral circuitry


    Original
    CY7C1298A/ GVT7164C18 CY7C1298A/GVT7164C18 65536x18 CY7C1315A CY7C1298A CY7C1298A GVT7164C18 PDF

    CY7C1315AV18-200BZC

    Abstract: RLDRAM
    Contextual Info: QDR SRAM and RLDRAM: A Comparative Analysis By Anuj Chakrapani, Cypress Semiconductor Corp. Abstract Today’s high-speed networking applications require high-bandwidth and high-density memory solutions. For instance, typical networking line cards need memories for a variety of operations that include packet


    Original
    relatidatasheets/rldram/MT49H16M18C TN-49-02, com/pdf/technotes/RLDRAMII/TN4902 TN-49-01, CY7C1315AV18-200BZC RLDRAM PDF

    CY7C1311BV18

    Abstract: CY7C1313BV18 CY7C1315BV18 CY7C1911BV18
    Contextual Info: CY7C1311BV18 CY7C1911BV18 CY7C1313BV18 CY7C1315BV18 PRELIMINARY 18-Mbit QDR -II SRAM 4-Word Burst Architecture Features Functional Description • Separate Independent Read and Write data ports — Supports concurrent transactions • 250-MHz clock for high bandwidth


    Original
    CY7C1311BV18 CY7C1911BV18 CY7C1313BV18 CY7C1315BV18 18-Mbit 250-MHz CY7C1311BV18 CY7C1313BV18 CY7C1315BV18 CY7C1911BV18 PDF

    CY7C1298A

    Abstract: GVT7164C18
    Contextual Info: 298A CY7C1298A/ GVT7164C18 64K x 18 Synchronous Burst RAM Pipelined Output Features • • • • • • • • • • • • • • • • • • • The CY7C1298A/GVT7164C18 SRAM integrates 65536x18 SRAM cells with advanced synchronous peripheral circuitry


    Original
    CY7C1298A/ GVT7164C18 CY7C1298A/GVT7164C18 65536x18 CY7C1315A CY7C1298A CY7C1298A GVT7164C18 PDF