CY7C1276KV18 Search Results
CY7C1276KV18 Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
|---|---|---|---|
| CQ 1265
Abstract: 3M Touch Systems 
 | Original | 36-Mbit CY7C1261KV18, CY7C1276KV18 CY7C1263KV18, CY7C1265KV18 CY7C1261KV18 CY7C1276KV18 CY7C1263KV18 CQ 1265 3M Touch Systems | |
| Contextual Info: CY7C1261KV18, CY7C1276KV18 CY7C1263KV18, CY7C1265KV18 36-Mbit QDR II+ SRAM 4-Word Burst Architecture 2.5 Cycle Read Latency 36-Mbit QDR® II+ SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) Features Configurations Separate independent read and write data ports | Original | CY7C1261KV18, CY7C1276KV18 CY7C1263KV18, CY7C1265KV18 36-Mbit CY7C1263KV18 | |
| 3M Touch SystemsContextual Info: CY7C1261KV18, CY7C1276KV18 CY7C1263KV18, CY7C1265KV18 36-Mbit QDR II+ SRAM 4-Word Burst Architecture 2.5 Cycle Read Latency 36-Mbit QDR® II+ SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) Features Configurations Separate independent read and write data ports | Original | 36-Mbit CY7C1261KV18, CY7C1276KV18 CY7C1263KV18, CY7C1265KV18 CY7C1261KV18 CY7C1276KV18 CY7C1263KV18 3M Touch Systems | |
| 3M Touch SystemsContextual Info: CY7C1263KV18, CY7C1265KV18 36-Mbit QDR II+ SRAM Four-Word Burst Architecture 2.5 Cycle Read Latency 36-Mbit QDR® II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) Features Configurations Separate independent read and write data ports ❐ Supports concurrent transactions | Original | CY7C1263KV18, CY7C1265KV18 36-Mbit CY7C1263KV18 3M Touch Systems | |
| Contextual Info: CY7C1263KV18/CY7C1265KV18 36-Mbit QDR II+ SRAM Four-Word Burst Architecture 2.5 Cycle Read Latency 36-Mbit QDR® II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) Features Configurations Separate independent read and write data ports ❐ Supports concurrent transactions | Original | CY7C1263KV18/CY7C1265KV18 36-Mbit CY7C1265KV18 |