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CY2XP304BVIT Datasheets (1)

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Cypress Semiconductor

Part	ECAD Model	Manufacturer	Description	Datasheet Type	PDF	PDF Size	Page count
CY2XP304BVIT		Cypress Semiconductor	Logic and Timing: High-Frequency Programmable PECL Clock Generation Module: T	Original	PDF	249.52KB	12

CY2XP304BVIT Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
CY2XP304 Abstract: CY2XP304BVC CY2XP304BVCT CY2XP304BVI CY2XP304BVIT Contextual Info: ADVANCE INFORMATION CY2XP304 High-Frequency Programmable PECL Clock Generation Module Features • HSTL inputs—HSTL-to-LVPECL level translation • 125- to 400-MHz output range for high-speed applications 500-MHz option available • Jitter peak-peak (TYPICAL) = 65 ps	Original	cy2xp304 400-mhz 500-mhz 36-vfbga +4cy2xp304bvc cy2xp304bvct cy2xp304bvi cy2xp304bvit	PDF
Contextual Info: CY2XP304 High-Frequency Programmable PECL Clock Generation Module Features • HSTL inputs—HSTL-to-LVPECL level translation • 125- to 500-MHz output range for high-speed applications • Period jitter peak-peak = 55 ps max at 125MHz • Four low-skew LVPECL outputs	Original	cy2xp304 125mhz 500-mhz 36-vfbga	PDF
413407 Contextual Info: CY2XP304 High-Frequency Programmable PECL Clock Generation Module Features • HSTL inputs—HSTL-to-LVPECL level translation • 40 ps typical peak-peak period jitter at 125 MHz • 125- to 500-MHz output range for high-speed applications • 30 ps typical output-output skew at 400 MHz	Original	cy2xp304 500-mhz 36-vfbga 413407	PDF
CY2XP304 Abstract: CY2XP304BVC CY2XP304BVCT CY2XP304BVI CY2XP304BVIT Contextual Info: CY2XP304 High-Frequency Programmable PECL Clock Generation Module Features • HSTL inputs—HSTL-to-LVPECL level translation • 125- to 500-MHz output range for high-speed applications • Period jitter peak-peak 125MHz max. = 55 ps • Four low-skew LVPECL outputs	Original	cy2xp304 500-mhz 125mhz 36-vfbga +4cy2xp304bvc cy2xp304bvct cy2xp304bvi cy2xp304bvit	PDF