CY23FP12
Abstract: CY23FP12OC CY3672
Contextual Info: CY23FP12 200-MHz Field Programmable Zero Delay Buffer Features Functional Description • Fully field-programmable: — Input and output dividers — Inverting/noninverting outputs • • • • • • • • • • • • • — Phase-locked loop PLL or fanout buffer configuration
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Original
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CY23FP12
200-MHz
10-MHz
28-pin
CY23FP12
CY23FP12OC
CY3672
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PDF
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CY23FP12
Abstract: CY23FP12OC CY3672 PS11011
Contextual Info: CY23FP12 200-MHz Field Programmable Zero Delay Buffer Features Functional Description • Fully field-programmable — Input and output dividers — Inverting/noninverting outputs — Phase-locked loop PLL or fanout buffer configuration • 10-MHz to 200-MHz operating range
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Original
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CY23FP12
200-MHz
10-MHz
28-pin
CY23FP12
CY23FP12OC
CY3672
PS11011
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PDF
|
CY23FP12
Abstract: CY23FP12OC CY3672
Contextual Info: CY23FP12 200-MHz Field Programmable Zero Delay Buffer Features Functional Description • Fully field-programmable — Input and output dividers — Inverting/noninverting outputs • • • • • • • • • • • • • — Phase-locked loop PLL or fanout buffer configuration
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Original
|
CY23FP12
200-MHz
10-MHz
28-pin
CY23FP12
CY23FP12OC
CY3672
|
PDF
|
CY23FP12
Abstract: CY23FP12OC CY3672
Contextual Info: CY23FP12 200-MHz Field Programmable Zero Delay Buffer Features Functional Description • Fully field-programmable — Input and output dividers — Inverting/noninverting outputs — Phase-locked loop PLL or fanout buffer configuration • 10-MHz to 200-MHz operating range
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Original
|
CY23FP12
200-MHz
10-MHz
28-pin
CY23FP12
CY23FP12OC
CY3672
|
PDF
|
CY23FP12
Abstract: CY23FP12OC CY3672
Contextual Info: CY23FP12 200-MHz Field Programmable Zero Delay Buffer Features Functional Description • Fully field-programmable: — Input and output dividers — Inverting/noninverting outputs • • • • • • • • • • • • • — Phase-locked loop PLL or fanout buffer configuration
|
Original
|
CY23FP12
200-MHz
10-MHz
28-pin
CY23FP12
CY23FP12OC
CY3672
|
PDF
|