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    CY23FP12OC Search Results

    CY23FP12OC Datasheets (6)

    Part ECAD Model Manufacturer Description Datasheet Type PDF PDF Size Page count
    CY23FP12OC
    		Cypress Semiconductor 200-MHz Field Programmable Zero Delay Buffer Original PDF 203.84KB 10
    CY23FP12OC
    		Cypress Semiconductor Logic ICS, 200MHz Field Programmable Zero Delay Buffer Original PDF 89.51KB 10
    CY23FP12OC-002
    		Cypress Semiconductor 200-MHz Field Programmable Zero Delay Buffer Original PDF 212.97KB 10
    CY23FP12OC-002T
    		Cypress Semiconductor 200-MHz Field Programmable Zero Delay Buffer Original PDF 212.98KB 10
    CY23FP12OCT
    		Cypress Semiconductor Logic ICS, 200MHz Field Programmable Zero Delay Buffer, Tape and Reel Original PDF 89.51KB 10
    CY23FP12OCT
    		Cypress Semiconductor Original PDF 203.83KB 10
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    Rochester Electronics LLC CY23FP12OC

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    Cypress Semiconductor CY23FP12OC

    CY23FP12OC
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    Rochester Electronics CY23FP12OC 1,345 1
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    Cypress Semiconductor CY23FP12OCT

    IN STOCK SHIP TODAY
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    Component Electronics, Inc CY23FP12OCT 22
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    CY23FP12OC Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    CY23FP12

    Abstract: CY23FP12-002 CY3672
    Contextual Info: CY23FP12-002 200-MHz Field Programmable Zero Delay Buffer Features Functional Description • Pre-programmed Configurations • Fully field-programmable — Input and output dividers — Inverting/noninverting outputs • • • • • • • • • •


    Original     		CY23FP12-002 200-MHz 10-MHz 28-pin CY23FP12-002 CY23FP12 CY3672 PDF

    CY23FP12

    Contextual Info: CY23FP12-002 200 MHz Field Programmable Zero Delay Buffer Features Functional Description • Pre-programmed Configuration ■ Fully Field-Programmable ❐ Input and output dividers ❐ Inverting/noninverting outputs ❐ Phase-locked loop PLL or fanout buffer configuration


    Original     		CY23FP12-002 CY23FP12-002 CY23FP12. CY23FP12 PDF

    CY23FP12

    Contextual Info: CY23FP12 200 MHz Field Programmable Zero Delay Buffer Functional Description Features • Fully field-programmable ❐ Input and output dividers ❐ Inverting/noninverting outputs ❐ Phase-locked loop PLL or fanout buffer configuration ■ 10 MHz to 200 MHz operating range


    Original     		CY23FP12 28-pin CY23FP12 PDF

    CY23FP12

    Abstract: CY23FP12OC CY3672
    Contextual Info: CY23FP12 200-MHz Field Programmable Zero Delay Buffer Features Functional Description • Fully field-programmable: — Input and output dividers — Inverting/noninverting outputs • • • • • • • • • • • • • — Phase-locked loop PLL or fanout buffer configuration


    Original     		CY23FP12 200-MHz 10-MHz 28-pin CY23FP12 CY23FP12OC CY3672 PDF

    CY23FP12

    Contextual Info: CY23FP12 200 MHz Field Programmable Zero Delay Buffer 200 MHz Field Programmable Zero Delay Buffer Features Functional Description • Fully field-programmable ❐ Input and output dividers ❐ Inverting/non-inverting outputs ❐ Phase-locked loop PLL or fanout buffer configuration


    Original     		CY23FP12 28-pin CY23FP1imited CY23FP12 PDF

    *OC002

    Abstract: CY23FP12
    Contextual Info: CY23FP12-002 200-MHz Field Programmable Zero Delay Buffer Features Functional Description • Pre-programmed configuration ■ Fully field-programmable ❐ Input and output dividers ❐ Inverting/noninverting outputs ❐ Phase-locked loop PLL or fanout buffer configuration


    Original     		CY23FP12-002 200-MHz CY23FP12-002 CY23FP12. *OC002 CY23FP12 PDF

    CY23FP12

    Abstract: CY23FP12OC CY3672 PS11011
    Contextual Info: CY23FP12 200-MHz Field Programmable Zero Delay Buffer Features Functional Description • Fully field-programmable — Input and output dividers — Inverting/noninverting outputs — Phase-locked loop PLL or fanout buffer configuration • 10-MHz to 200-MHz operating range


    Original     		CY23FP12 200-MHz 10-MHz 28-pin CY23FP12 CY23FP12OC CY3672 PS11011 PDF

    CY23FP12

    Abstract: *OC002 CY23FP12-002 CY3672
    Contextual Info: CY23FP12-002 200-MHz Field Programmable Zero Delay Buffer Features Functional Description • Pre-programmed Configurations • Fully field-programmable — Input and output dividers — Inverting/noninverting outputs • • • • • • • • • •


    Original     		CY23FP12-002 200-MHz 10-MHz 28-pin CY23FP12-002 CY23FP12 *OC002 CY3672 PDF

    CY23FP12

    Abstract: CY23FP12OC CY3672
    Contextual Info: CY23FP12 200-MHz Field Programmable Zero Delay Buffer Features Functional Description • Fully field-programmable — Input and output dividers — Inverting/noninverting outputs • • • • • • • • • • • • • — Phase-locked loop PLL or fanout buffer configuration


    Original     		CY23FP12 200-MHz 10-MHz 28-pin CY23FP12 CY23FP12OC CY3672 PDF

    CY23FP12

    Abstract: CY23FP12OXC CY3692
    Contextual Info: CY23FP12 200 MHz Field Programmable Zero Delay Buffer Features Functional Description • Fully field-programmable ❐ Input and output dividers ❐ Inverting/noninverting outputs ❐ Phase-locked loop PLL or fanout buffer configuration ■ 10 MHz to 200 MHz operating range


    Original     		CY23FP12 CY23FP12 CY23FP12OXC CY3692 PDF

    CY23FP12

    Abstract: CY23FP12OC CY3672
    Contextual Info: CY23FP12 200-MHz Field Programmable Zero Delay Buffer Features Functional Description • Fully field-programmable — Input and output dividers — Inverting/noninverting outputs — Phase-locked loop PLL or fanout buffer configuration • 10-MHz to 200-MHz operating range


    Original     		CY23FP12 200-MHz 10-MHz 28-pin CY23FP12 CY23FP12OC CY3672 PDF

    CY23FP12

    Abstract: CY23FP12OC CY3672
    Contextual Info: CY23FP12 200-MHz Field Programmable Zero Delay Buffer Features Functional Description • Fully field-programmable: — Input and output dividers — Inverting/noninverting outputs • • • • • • • • • • • • • — Phase-locked loop PLL or fanout buffer configuration


    Original     		CY23FP12 200-MHz 10-MHz 28-pin CY23FP12 CY23FP12OC CY3672 PDF

    CY23FP12

    Abstract: CY23FP12-002 CY3692 CY23FP120
    Contextual Info: CY23FP12-002 200-MHz Field Programmable Zero Delay Buffer Features Functional Description • Pre-programmed configuration ■ Fully field-programmable ❐ Input and output dividers ❐ Inverting/non inverting outputs ❐ Phase-locked loop PLL or fanout buffer configuration


    Original     		CY23FP12-002 200-MHz CY23FP12-002 CY23FP12. CY23FP12 CY3692 CY23FP120 PDF

    CY23FP12

    Abstract: CY23FP12OXC CY3692 ADP006
    Contextual Info: CY23FP12 200 MHz Field Programmable Zero Delay Buffer Features Functional Description • Fully Field-Programmable ❐ Input and output dividers ❐ Inverting/noninverting outputs ❐ Phase-locked loop PLL or fanout buffer configuration ■ 10 MHz to 200 MHz Operating Range


    Original     		CY23FP12 28-pin CY23FP12 CY23FP12OXC CY3692 ADP006 PDF