CXQ71082 Search Results

8088 microprocessor block diagrammed with direction

Abstract: CXQ70108 CXQ70116 CXQ71082 CXQ71083 stb CIRCUIT DIAGRAM
Contextual Info: SONY CXQ71082/CXQ710 8 3 8 -Bit Latch P in C o n fig u la tio n Top View D e sc rip tio n C X Q 7 1 0 8 2 and C X Q 7 1 0 8 3 are C M O S 8-b it tran s­ parent la tch es w ith three-state output buffers. T h e y are use d a s b u s buffers or b u s m ultiplexers in

cxq70116

Abstract: CXQ71071
Contextual Info: CXQ71071 SONY DMA Controller Pin C o n fig uratio n cue c "i RESET C 2 ËFiB/fC C 3 DMAAK3 C 4 DMAAK2 C 5 DMAAK1 C 0 DMAAKO C 7 DMARQ3C 8 DMARQ2C 9 0MAR01 C 10 0MARQO C 11 GNO C 12 C 19 O14/A22 c 14 O13/A« c 15 o-ia/Aao C 16 D11/A1« C 17 D10/A1* c 18 D»/Ai7 C 19

Contextual Info: SO N Y CXQ 7 1 0 8 2 /CXQ71 0 8 3 8-Bit Latch Pin Configulation Top View Description C X Q 7 1 0 8 2 and C X Q 7 1 0 8 3 are C M O S 8-bit trans­ parent latches with three-state output buffers. They are used as bus buffers or bus multiplexers in m icroprocessor systems. Their high-drive capability

stb CIRCUIT DIAGRAM

Abstract: CXQ71082 CXQ70108 CXQ70116 CXQ71083
Contextual Info: SONY CXQ 71082/CXQ 71083 8 -Bit Latch Pin Configulation Top View Description C X Q 7 1 0 8 2 and C X Q 7 1 0 8 3 are C M O S 8-b it tran s­ parent la tch es w ith three-state output buffers. T h e y are use d a s b u s buffers or b u s m ultiplexers in

CXQ71071

Abstract: CXQ70108 71071 CXQ70116
Contextual Info: S o n C y X Q 7 1 7 1 D M A C o n tro lle r Description The CXQ71071 is a high-speed, high-perfor­ mance D irect M emory Access DMA con tro ller that provides high speed data transfers between peripheral devices and memories. A programmable bus w idth allow s bidirectional data transfer in

CXQ71071

Contextual Info: CXQ71071 SONY DMA Controller Description The CXQ71071 is a high-speed, high-performance Direct Memory Access DMA controller that provides high speed data transfers between peripheral devices and memories. A programmable bus width allows bidirectional data transfer in