CSIX Search Results

VSC7320

Abstract: ethernet mac chip 10G Ethernet MAC
Contextual Info: PHYSICALDATACOM LAYER PRODUCT PRODUCT VSC7320 VSC7320 Meigs-I - 10 Gigabit MAC Chip S P E C I F I C AT I O N S : 41.8 V Core and CSIX-64 Power Supply 43.3 V I/O and CPU Interface Power Supply 4792-Pin EBGA Package A P P L I C AT I O N S : 410 Gigabit Ethernet MAC

Contextual Info: ispLever CORE TM CSIX Level 1 IP Core User’s Guide October 2005 ipug16_02.0 Lattice Semiconductor CSIX Level 1 IP Core User’s Guide Introduction Lattice’s CSIX Level 1 core provides an ideal solution that meets the needs of today’s CSIX applications. The CSIX

project on water level control

Abstract: MPC860
Contextual Info: ispLever CORE TM CSIX Level 1 Interface Core User’s Guide User’s Guide August 2003 ipug16_01 Lattice Semiconductor CSIX Level 1 Interface Core User’s Guide Introduction Lattice’s CSIX Level 1 core provides an ideal solution that meets the needs of today’s CSIX applications. The CSIX

serdes ip

Abstract: 36b100 ORSO82G5 PI40 Parameterizable CSIX 15MULTICAST
Contextual Info: CSIX-to-PI40 IP Core January 2004 IP Data Sheet • Ingress data Cframe FIFO size of 1,024 bytes. ■ Egress data Cframe FIFO size of 4,096 bytes. ■ Egress control Cframe FIFO size of 1,024 bytes. ■ Parameterizable PI40 user payload size 64, 72 or 80 octets and corresponding Cframe

ethernet mac chip

Abstract: fpga rgmii Meigs VSC7320 VSC7322
Contextual Info: PHYSICAL LAYER PRODUCTS PRODUCT DATACOM VSC7322 VSC7322 Lansing 10x1 Gigabit Ethernet MAC chip S P E C I F I C AT I O N S : 425 MHz Reference Clock 41.8 V Core and CSIX-64 Power Supply 42.5 V RGMII/RBTI Interface Power Supply 43.3 V CPU Power Supply 4680-Pin, 40 x 40 mm TSBGA Package

Contextual Info: ispLever CORE TM CSIX-to-PI40 IP Core User’s Guide October 2005 ipug17_02.0 Lattice Semiconductor CSIX-to-PI40 IP Core User’s Guide Introduction Lattice’s CSIX-to-PI40 core provides a customizable solution allowing a CSIX interface to Agere Systems’ PI40

RGMII

Abstract: VSC7320 VSC7322 fpga rgmii
Contextual Info: PHYSICALETHERNET LAYER PRODUCT PRODUCT VSC7322 Lansing - 10 x 1 Gigabit Ethernet MAC Chip S P E C I F I C AT I O N S : 25 MHz Reference Clock 1.8 V Core and CSIX-64 Power Supply 2.5 V RGMII/RBTI Interface Power Supply 3.3 V CPU Power Supply 680-Pin, 40 x 40 mm TSBGA Package

Contextual Info: VSC7322 Data Sheet ● Ten 10/100/1000 Mb/s RGMII/ RTBI interfaces ● CSIX-64 AC Class2 host interface ● Full bandwidth nonblocking performance on receive and transmit simultaneously ● Intelligent VLAN and MPLS tagging and untagging feature ● Jumbo frame support

Exbit Technology

Abstract: ethernet mac chip Ix 1643 10G Ethernet PHy EXB10GTM
Contextual Info: Exbit Technology A/S Meigs TM -10 Gigabit Ethernet MAC Chip PRELIMINARY - SUBJECT TO CHANGE Overview Meigs is an Ethernet MAC Chip that provides 10 Gigabit connectivity for LAN, MAN, and WAN networks. Meigs allows systems with a standard CSIX port access to either a single 10 Gigabit XGMII

unilink

Abstract: C192 IBM3266P6098 Q-64G SA-27E 92x92 ibm q x49
Contextual Info: Preliminary IBM PowerPRS 16G/C192 Summary Datasheet Packet Routing Switch and Common Switch Interface General Information Features • Stand-alone or back-to-back switch for four or eight CSIX ports • Configurable number of traffic priorities from one to four

x289

Abstract: XAPP289
Contextual Info: Application Note: Virtex-II Series R XAPP289 v1.2 April 1, 2002 Common Switch Interface CSIX-L1 Reference Design Author: Markus Adhiwiyogo Summary This application note describes an implementation of a CSIX-L1 common switch interface between a network processor’s traffic manager and the switching fabric for ATM, IP, MPLS,

VAA33

Abstract: ZSF200 AA36
Contextual Info: Switch Fabric Data Sheet Description 89TSF5xx Features Up to 32 switch ports, with 24 Gbps available per switch port. Variable length CSIX payload up to 132 bytes that supports any type of traffic. ◆ Virtual output queues (VOQs) in the ingress direction that

vitesse 10G

Contextual Info: PHYSICALDATACOM LAYER PRODUCT PRODUCT VSC7320 Meigs-I - 10 x 1 Gigabit Ethernet MAC Chip S P E C I F I C AT I O N S : 41.8 V Core and CSIX-64 Power Supply 43.3 V I/O and CPU Interface Power Supply 4792-Pin EBGA Package A P P L I C AT I O N S : 410 Gigabit Ethernet MAC

360 ibm datasheet

Abstract: SA-27E IBM3247P4448 64Kentry
Contextual Info: Advance Summary Datasheet IBM PowerPRS C48 Common Switch Interface General Information Features • Companion to the IBM PowerPRS 64Gu Packet Routing Switch chip • CSIX interface attachment to the PowerPRS 64Gu switch core • CSIX-L1 interface: OC-48 adapter, compliant

BCM8332

Abstract: BCM8320 Fabric
Contextual Info: BCM8320 DUAL 10G FABRIC INTERFACE SUMMARY OF BENEFITS FEATURES • Highly integrated, scalable switch fabric • Single-chip bandwidth of up to 40 Gbps • Supports two CSIX interfaces to line side • Guaranteed Class of Service through the system – fabric

Contextual Info: BCM8320 PRODUCT Brief DUAL 10G B C M 8 3 2 0 FABRIC F E AT U R E S • Highly integrated, scalable switch fabric • Single-chip bandwidth of up to 40 Gbps two CSIX interfaces to line side • •Supports Each CSIX supports 32, 64, or 128 bits at speeds up to

x289

Abstract: XAPP289
Contextual Info: Application Note: Virtex-II Series Common Switch Interface CSIX-L1 Reference Design R XAPP289 v1.1 August 15, 2001 Author: Markus Adhiwiyogo Summary This application note describes a Virtex -II device implementation of a CSIX-L1 common switch interface between a network processor’s traffic manager and the switching fabric for

MPC860

Abstract: OR4E04-2BM680C
Contextual Info: CSIX Level 1 IP Core January 2004 IP Data Sheet • Filters Idle Frames Not Transported Through Core ■ Delineates Cframes at Generic FIFO Bridge Interface with Start/End Flags (SOF and EOF) ■ Passes Entire CSIX Frame Structure Across Generic FIFO Bridge Interface

VAA33

Abstract: cos v21 l10
Contextual Info: Switch Fabric Data Sheet Description Variable length CSIX payload up to 132 bytes that supports any type of traffic. ◆ Virtual output queues (VOQs) in the ingress direction that eliminate head-of-line blocking. The 256 unicast VOQs provide: – A maximum of 32 ports with 8 CoS, or

10G serdes bert

Abstract: BCM8320 BCM8332 data link block diagram
Contextual Info: BCM8320 PRODUCT Brief DUAL 10G B C M 8 3 2 0 FABRIC F E AT U R E S • Highly integrated, scalable switch fabric • Single-chip bandwidth of up to 40 Gbps two CSIX interfaces to line side • •Supports Each CSIX supports 32, 64, or 128 bits at speeds up to

IP-CSIX-L1

Abstract: EP1S10F780C5 EP1S10F780C6 EP1S25F1020C6 EP20K400EFC672-1X
Contextual Info: Common Switch Interface CSIX-L1 MegaCore Function User Guide 101 Innovation Drive San Jose, CA 95134 (408) 544-7000 www.altera.com Core Version: 1.0.0 Document Version: 1.0.0 rev1 Document Date: November 2002 Copyright Common Switch Interface (CSIX-L1) MegaCore Function User Guide

mc 8040

Abstract: 809C ORSO82G5 PI40
Contextual Info: ispLever CORE TM CSIX-to-PI40 IP Core User’s Guide August 2003 ipug17_01 Lattice Semiconductor CSIX-to-PI40 IP Core User’s Guide Introduction Lattice’s CSIX-to-PI40 core provides a customizable solution allowing a CSIX interface to Agere Systems’ PI40

MC 4011 BCP

Abstract: PKT 4113 API ncp 6131 SWITCHING SYSTEMS INTERNATIONAL sqm 225 leach 1522 her 4541 MSP SNCP t 1451 n 52 toh SWITCHING SYSTEMS INTERNATIONAL sqm 350 k2400 EQUIVALENT
Contextual Info: EtherPHAST -24 Device 2x OC-12/STM-4 SONET/SDH Ethernet Mapper TXC-06745 DATA SHEET TXC-06745-MB, Ed. 2 February 2006 FEATURES APPLICATIONS • Client Interfaces: 2x GMII/24x SMII/4x TBI/MPI 24 channel packet all pin shared • Two serial Gigabit Ethernet (1.25 Gbit/s) ports with integrated CRSU/SerDes (8B/10B)

power amplifier ic ta2040

Abstract: Nokia 6100 LCD TA2040 Transceiver Broadcom 3G RF interfacing 8051 with bluetooth modem Tripath TA2040 AMPLIFIER pixelworks L7205 tft interface with 8051 trw radar ac
Contextual Info: SEMICONDUCTOR TIMES JULY 2000 / 1 JULY 2000 FOCUSED ON EMERGING SEMICONDUCTOR COMPANIES Radar Scope Bay Microsystems Bay Microsystems was recently founded to develop chips. What kind? The company wouldn’t disclose any details to us. One rumor is “high-speed interfaces” whatever