CS26LV81923 Search Results
CS26LV81923 Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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Contextual Info: Low Power Pseudo SRAM 512K word x 16 bit CS26LV81923 Revision History Rev. No. 2.0 2.1 2.2 History Initial issue with new naming rule Revise read/write cycle time tRC Delete Page read cycle time Revise VCC from 2.7~3.3V to 2.7 to 3.6V Issue Date Mar.01,2005 |
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CS26LV81923 CS26LV81923 | |
Contextual Info: Low Power Pseudo SRAM CS26LV81923 512K word x 16 bit Description The CS26LV81923 is a high performance, high speed, low power pseudo SRAM organized as 524,288 words by 16 bits and operates from a wide range of 2.7 to 3.3V supply voltage. Advanced DRAM technology and circuit techniques provide both high speed and |
Original |
CS26LV81923 CS26LV81923 70/85ns 48-pin 48Ball | |
Contextual Info: Low Power Pseudo SRAM 512K word x 16 bit CS26LV81923 Revision History Rev. No. 2.0 2.1 History Initial issue with new naming rule Revise read/write cycle time tRC Delete Page read cycle time Issue Date Mar.01,2005 Sep. 09, 2005 Remark 1 Rev. 2.1 Chiplus reserves the right to change product or specification without notice. |
Original |
CS26LV81923 CS26LV81923 | |
Contextual Info: Low Power Pseudo SRAM CS26LV81923 512K word x 16 bit Revision History Rev. No. 2.0 History Initial issue with new naming rule Issue Date Mar.01,2005 Remark 1 Rev. 2.0 Chiplus reserves the right to change product or specification without notice. Low Power Pseudo SRAM |
Original |
CS26LV81923 CS26LV81923 70/85ns 48Ball |