CS 13003 Search Results

HDB3 schematic

Abstract: VL80C75-PC
Contextual Info: V L S I TECHNOLOGY INC Ifl VLSI D e | =1300347 0001S2Q 0 ^ T - l S - i h V i Te c h n o l o g y , in c . VL80C75 T1 INTERFACE FEATURES DESCRIPTION • Supports T1, T1C, and CEPT data rates The VL80C75 is a general purpose PCM Line Interface circuit. It Is designed Ho

DDR200

Abstract: DDR266 DDR333 W3EG72126S-D3 DEVICE MARKING CODE T10C 13003 d
Contextual Info: W3EG72126S-D3 -JD3 -AJD3 White Electronic PRELIMINARY* 1GB-128Mx72 DDR SDRAM REGISTERED ECC w/PLL FEATURES DESCRIPTION Double-data-rate architecture The W3EG72126S is a 128Mx72 Double Data Rate SDRAM memory module based on 512Mb DDR SDRAM components. The module consists of eighteen 128Mx4

Contextual Info: W3EG72126S-D3 -JD3 -AJD3 White Electronic Designs PRELIMINARY* 1GB-128Mx72 DDR SDRAM REGISTERED ECC w/PLL FEATURES DESCRIPTION Double-data-rate architecture The W3EG72126S is a 128Mx72 Double Data Rate SDRAM memory module based on 512Mb DDR SDRAM component. The module consists of eighteen 128Mx4

7475 latch

Abstract: Register 7475 DDR200 DDR266 DDR333 W3EG72126S-D3
Contextual Info: W3EG72126S-D3 -JD3 -AJD3 White Electronic Designs PRELIMINARY* 1GB-128Mx72 DDR SDRAM REGISTERED ECC w/PLL FEATURES DESCRIPTION Double-data-rate architecture The W3EG72126S is a 128Mx72 Double Data Rate SDRAM memory module based on 512Mb DDR SDRAM components. The module consists of eighteen 128Mx4

Contextual Info: White Electronic Designs W3EG7264S-D3 PRELIMINARY* 512MB- 64Mx72 DDR SDRAM UNBUFFERED FEATURES DESCRIPTION The W3EG7264S is a 64Mx72 Double Data Rate SDRAM memory module based on 512Mb DDR SDRAM component. The module consists of nine 64Mx8 DDR SDRAMs in 66 pin TSOP packages mounted on a 184

Contextual Info: W3EG7264S-D3 -JD3 -AJD3 White Electronic Designs PRELIMINARY* 512MB- 64Mx72 DDR SDRAM UNBUFFERED FEATURES DESCRIPTION The W3EG7264S is a 64Mx72 Double Data Rate SDRAM memory module based on 512Mb DDR SDRAM component. The module consists of nine 64Mx8 DDR SDRAMs in 66 pin TSOP packages mounted on a 184

VL86C410

Abstract: VL86C010 vl1772
Contextual Info: V L S I TECHNOLOGY INC 5 ?E D ÎBÔÛBH? QOObSOñ 1 • T -S Z -3 V 1V L S I T e ch n o lo g y , in c. 5 3 VL86C410 RISC I/O CONTROLLER IOC FEATURES DESCRIPTION • Power on reset control The VL86C410 Input/Output Controller (IOC) is designed to interface to the

Contextual Info: White Electronic Designs W3EG6432S-D3 PRELIMINARY* 256MB- 32Mx64 DDR SDRAM UNBUFFERED FEATURES DESCRIPTION Double-data-rate architecture The W3EG6432S is a 32Mx64 Double Data Rate SDRAM memory module based on 256Mb DDR SDRAM component. The module consists of eight 32Mx8 DDR

Contextual Info: White Electronic Designs W3EG6432S-D3 PRELIMINARY* 256MB- 32Mx64 DDR SDRAM UNBUFFERED FEATURES DESCRIPTION Double-data-rate architecture The W3EG6432S is a 32Mx64 Double Data Rate SDRAM memory module based on 256Mb DDR SDRAM component. The module consists of eight 32Mx8 DDR

Contextual Info: WED3EG6432S-D3 White Electronic Designs ADVANCED* 256MB- 32Mx64 DDR SDRAM UNBUFFERED FEATURES DESCRIPTION  Double-data-rate architecture The WED3EG6432S is a 32Mx64 Double Data Rate SDRAM memory module based on 256Mb DDR SDRAM component. The module consists of eight 32Mx8 DDR

Contextual Info: White Electronic Designs W3EG7264S-D3 PRELIMINARY* 512MB – 64Mx72 DDR SDRAM UNBUFFERED FEATURES DESCRIPTION The W3EG7264S is a 64Mx72 Double Data Rate SDRAM memory module based on 512Mb DDR SDRAM components. The module consists of nine 64Mx8 DDR SDRAMs in 66 pin TSOP packages mounted on a 184

DDR200

Abstract: DDR266 DDR333 DDR400 42704
Contextual Info: White Electronic Designs W3EG7264S-JD3-D3 PRELIMINARY* 512MB – 64Mx72 DDR SDRAM UNBUFFERED FEATURES DESCRIPTION The W3EG7264S is a 64Mx72 Double Data Rate SDRAM memory module based on 512Mb DDR SDRAM components. The module consists of nine 64Mx8 DDR SDRAMs in 66 pin TSOP packages mounted on a 184

Vt2130

Contextual Info: V L S I TECHNOLOGY INC Tö D E | 1BÄÖ3M7 0001757 1 § , 7.46. VLSI T e c h n o l o g y , i n c . VT2130 • VT2131 1,024x8 DUAL PORT RANDOM ACCESS MEMORY FEATURES DESCRIPTION « 120 ns address access time The VT2130 and VT2131 are 8,192-bit Dual Port Static Random Access Mem­

reset samsung 1665

Abstract: DDR200 DDR266 DDR333 DDR400 13003 TO 92 PACKAGE
Contextual Info: White Electronic Designs W3EG7264S-JD3-D3 512MB – 64Mx72 DDR SDRAM UNBUFFERED FEATURES DESCRIPTION The W3EG7264S is a 64Mx72 Double Data Rate SDRAM memory module based on 512Mb DDR SDRAM components. The module consists of nine 64Mx8 DDR SDRAMs in 66 pin TSOP packages mounted on a 184

Contextual Info: VLSI T ech n o lo gy , in c . V P 14335/14574 T1/E1 LINE INTERFACE UNIT FEATURES DESCRIPTION APPLICATIONS • Analog PCM line interface for T1 and E1 PCM-30 applications The VP14335/14574 Line Interface Unit is a monolithic integrated circuit that supports DSX-1 compatible transmit

T600B

Abstract: E1 AMI HDB3 decoder
Contextual Info: VLSI T ech n o lo gy , in c . V P 14335/14574 T1/E1 LINE INTERFACE UNIT FEATURES DESCRIPTION APPLICATIONS • Analog PCM line interface for T1 and E1 PCM-30 applications The VP14335/14574 Line Interface Unit is a monolithic integrated circuit that supports DSX-1 compatible transmit

TRIAC 97A6

Abstract: S0805BH 13003 TRANSISTOR TO220 equivalent triacs bt 804 600v Triac bt 808 600C Diode SOT-23 marking 15d zener diode 1N PH 48 6Bs smd transistor Z0409MF equivalent BT 808 600C
Contextual Info: Central Semiconductor Corp. Represented iSIGNTBOHICS B y: TORONTO I Regan Road, Unit 13, Bram pton, O ntario L7A 1B8 Tel: 905-846-1100 Fax:905-846-7116 E -m a il: d e s ig n tr< a id ire c t.c o m OTTAW A 21 Pine Bluff Trail, Stittsville, O ntario K2S 1E1

Contextual Info: White Electronic Designs W3EG6432S-D3 PRELIMINARY* 256MB - 32Mx64 DDR SDRAM UNBUFFERED FEATURES DESCRIPTION Double-data-rate architecture The W3EG6432S is a 32Mx64 Double Data Rate SDRAM memory module based on 256Mb DDR SDRAM component. The module consists of eight 32Mx8 DDR

DDR200

Abstract: DDR266 DDR333 DDR400 W3EG6432S-D3
Contextual Info: W3EG6432S-D3 -JD3 White Electronic Designs PRELIMINARY* 256MB – 32Mx64 DDR SDRAM UNBUFFERED FEATURES DESCRIPTION Double-data-rate architecture The W3EG6432S is a 32Mx64 Double Data Rate SDRAM memory module based on 256Mb DDR SDRAM components. The module consists of eight 32Mx8 DDR

DDR200

Abstract: DDR266 DDR333 DDR400 W3EG6432S-D3
Contextual Info: W3EG6432S-D3 -JD3 White Electronic Designs PRELIMINARY* 256MB – 32Mx64 DDR SDRAM UNBUFFERED FEATURES DESCRIPTION Double-data-rate architecture The W3EG6432S is a 32Mx64 Double Data Rate SDRAM memory module based on 256Mb DDR SDRAM components. The module consists of eight 32Mx8 DDR

7812

Contextual Info: W3EG6432S-D3 -JD3 White Electronic Designs PRELIMINARY* 256MB – 32Mx64 DDR SDRAM UNBUFFERED FEATURES DESCRIPTION Double-data-rate architecture The W3EG6432S is a 32Mx64 Double Data Rate SDRAM memory module based on 256Mb DDR SDRAM components. The module consists of eight 32Mx8 DDR

REGULATOR sw 13003

Abstract: 13003 switch mode circuit
Contextual Info: ACT334 Rev 2, 14-Nov-12 High Performance ActivePSRTM Primary Switching Regulator FEATURES over temperature conditions. • Ultra Low Standby Power < 30mW The ACT334 ActivePSRTM is optimized for high performance, cost-sensitive applications, and utilizes Active-Semi’s proprietary primary-side

transistor eb 13003

Abstract: eb 13003 SPS 13003 13003 sd transistor sd 13003 sw 13003 13003 application notes 13003 TO 92 PACKAGE MC9328MX1VH20 AN2537
Contextual Info: Freescale Semiconductor Advance Information MC9328MX1/D Rev. 4, 08/2004 MC9328MX1/D Rev. 3.0, 12/2003 MC9328MX1 i.MX1 Integrated Portable System Processor MC9328MX1 MC9328MX1 Package Information Plastic Package (MAPBGA–256) Ordering Information See Table 2 on page 5

transistor eb 13003

Abstract: eb 13003 AN2537 SPS 13003 t9 bluetooth MC9328MX1VH20 MC9328MX1VM20 CKE 8002 transistor sd 13003 BT1 BCM
Contextual Info: Freescale Semiconductor Advance Information MC9328MX1/D Rev. 4.1, 11/2004 MC9328MX1/D Rev. 3.0, 12/2003 MC9328MX1 i.MX1 Integrated Portable System Processor MC9328MX1 MC9328MX1 Package Information Plastic Package (MAPBGA–256) Ordering Information See Table 2 on page 5