CRYSTAL HS 8000 M Search Results

AT91sam9M10

Abstract: HOW TO INTERFACE BP SENSOR TO ARM PROCESSOR lpddr2 lpddr2 datasheet AT91SAM9M10-CU atmel 944 Atmel touchscreen ARM926EJ-S ISO7816 SAM9M10
Contextual Info: Features • 400 MHz ARM926EJ-S ARM Thumb® Processor – 32 KBytes Data Cache, 32 KBytes Instruction Cache, MMU • Memories • • • • – DDR2 Controller 4-bank DDR2/LPDDR, SDRAM/LPSDR – External Bus Interface supporting 4-bank DDR2/LPDDR, SDRAM/LPSDR, Static

STM8S208

Abstract: RM0016 STM8S 5401 DM pm0044 sda 5241 STM8 CPU programming manual LQFP32 LQFP44 LQFP48
Contextual Info: STM8S207xx STM8S208xx Performance line, 24 MHz STM8S 8-bit MCU, up to 128 Kbytes Flash, integrated EEPROM,10-bit ADC, timers, 2 UARTs, SPI, I²C, CAN Features • ■ ■ ■ ■ Core – Max fCPU: Up to 24 MHz, 0 wait states @ fCPU ≤ 16 MHz – Advanced STM8 core with Harvard

pin diagram for IC 7473

Abstract: IC 8038 function generator frequency generator 8038 STM8S207 8038 ic pin diagram STM8S208 STM8 CPU programming manual ST visual develop STVD user manual pm0051 pm0044
Contextual Info: STM8S207xx STM8S208xx Performance line, 24 MHz STM8S 8-bit MCU, up to 128 Kbytes Flash, integrated EEPROM,10-bit ADC, timers, 2 UARTs, SPI, I²C, CAN Features • Core – Max fCPU: up to 24 MHz, 0 wait states @ fCPU ≤ 16 MHz – Advanced STM8 core with Harvard

lpddr2

Abstract: Atmel touchscreen AT91SAM9M11 lpddr2 datasheet wVGA touchscreen 5 wire 16-bit color sha256 Datasheet LPDDR2 SDRAM 12M hz crystal ARM926EJ-S e.mmc
Contextual Info: Features • 400 MHz ARM926EJ-S ARM Thumb® Processor – 32 KBytes Data Cache, 32 KBytes Instruction Cache, MMU • Memories • • • • • – 4-port, 4-bank DDR2/LPDDR Controller – External Bus Interface supporting 4-bank DDR2/LPDDR, SDRAM/LPSDR, Static

lpddr2

Abstract: lpddr2 datasheet AT91SAM9M10-CU Datasheet LPDDR2 SDRAM lpddr2 pcb layout Atmel touchscreen sam9M10 AT91sam9M10 Atmel touch screen ARM V7
Contextual Info: Features • 400 MHz ARM926EJ-S ARM Thumb® Processor – 32 KBytes Data Cache, 32 KBytes Instruction Cache, MMU • Memories • • • • – DDR2 Controller 4-bank DDR2/LPDDR, SDRAM/LPSDR – External Bus Interface supporting 4-bank DDR2/LPDDR, SDRAM/LPSDR, Static

lpddr2

Abstract: lpddr2 datasheet Atmel touchscreen 12M hz crystal ARM926EJ-S jtag sha256 Datasheet LPDDR2 SDRAM ddr2 ram slot pin detail Jazelle v1 Architecture Reference Manual lcd N7
Contextual Info: Features • 400 MHz ARM926EJ-S ARM Thumb® Processor – 32 KBytes Data Cache, 32 KBytes Instruction Cache, MMU • Memories • • • • • – 4-port, 4-bank DDR2/LPDDR Controller – External Bus Interface supporting 4-bank DDR2/LPDDR, SDRAM/LPSDR, Static

STM8S

Abstract: stm8s207XX STM8S208 4801h STM8S207 STM8S 207 IN5142 UM04 STM8S208xx STM8S207K8
Contextual Info: STM8S207xx STM8S208xx Performance line, 24 MHz STM8S 8-bit MCU, up to 128 Kbytes Flash, integrated EEPROM, 10-bit ADC, timers, 2 UARTs, SPI, I²C, CAN Features • Core – Max fCPU: up to 24 MHz, 0 wait states @ fCPU  16 MHz – Advanced STM8 core with Harvard

STM8S208x

Abstract: stm8s208 STM8S20 afr45 8000-0x00 STM8S STM8S 207
Contextual Info: STM8S207xx STM8S208xx Performance line, 24 MHz STM8S 8-bit MCU, up to 128 KB Flash, integrated EEPROM, 10-bit ADC, timers, 2 UARTs, SPI, I²C, CAN Features • Core – Max fCPU: up to 24 MHz, 0 wait states @ fCPU ≤ 16 MHz – Advanced STM8 core with Harvard

emmc "boot mode"

Abstract: 8x8 keypad Encoder IC imx255 emmc freescale arm processor I.MX25 mx257 eMMC 4.5 emmc boot i.mx258 MX251
Contextual Info: Freescale Semiconductor Application Note Document Number: AN3999 Rev. 0, 03/2010 i.MX27 to i.MX25 Porting Guide by Multimedia Applications Division Freescale Semiconductor, Inc. Austin, TX The i.MX family has a few ARM 9 microprocessors. Among them, the most widely used is the i.MX27 processor and, one

lpddr2

Abstract: lpddr2 datasheet sam9m11 sha256 AES256 Atmel touchscreen ARM926EJ-S ISO7816 eMMC 4.4
Contextual Info: Features • 400 MHz ARM926EJ-S ARM Thumb® Processor – 32 KBytes Data Cache, 32 KBytes Instruction Cache, MMU AT91 ARM Thumb-based Microcontrollers • Preliminary Summary AT M EL • AT91SAM9M11 C O N FI D EN TI • – 4-port, 4-bank DDR2/LPDDR Controller

lpddr2

Abstract: lpddr2 datasheet AES256 sha256 Atmel touchscreen ARM926EJ-S ISO7816 ad2y DFSDM
Contextual Info: Features • 400 MHz ARM926EJ-S ARM Thumb® Processor – 32 KBytes Data Cache, 32 KBytes Instruction Cache, MMU TI AT91SAM9G46 Preliminary Summary AT M EL • AT91 ARM Thumb-based Microcontrollers C O N • FI D EN • – 4-port, 4-bank DDR2/LPDDR Controller

tmm27256ad

Abstract: CM20A 87CC20
Contextual Info: TOSHIBA TMP87PH20/PM20 CMOS 8-BIT MICROCONTROLLER TMP87PH20F, TMP87PM20F The 87PH20 is an One-Time PROM microcontroller with low-power 128K bits 16K bytes electrically programmable read only memory, the 87PM20 is an One-Time PROM microcontroller with low-power 256K

STM8S105

Abstract: STM8S105C PM0051 STM8S105S STM8S105K adc example sTM8s STM8S MAX1467 UFQFPN-32 trace code UM04
Contextual Info: STM8S105xx Access line, 16 MHz STM8S 8-bit MCU, up to 32 Kbytes Flash, integrated EEPROM,10-bit ADC, timers, UART, SPI, I²C Interrupt management Nested interrupt controller with 32 interrupts • • Up to 37 external interrupts on 6 vectors LQFP48 7x7 LQFP44 10x10

STM8 spi programming manual

Abstract: STM8S105 adc example sTM8s Date Code Marking STM8 PWM example sTM8l
Contextual Info: STM8S105xx Access line, 16 MHz STM8S 8-bit MCU, up to 32 Kbytes Flash, integrated EEPROM,10-bit ADC, timers, UART, SPI, I²C Interrupt management Nested interrupt controller with 32 interrupts • • Up to 37 external interrupts on 6 vectors LQFP48 7x7 LQFP44 10x10

STM8L151

Abstract: STM32L15x 5219 5V REGULATOR LSE B3 15962 pm0044 STM8L151G rm0013 STM32L15xxx STM32L
Contextual Info: STM8L151xx, STM8L152xx 8-bit ultralow power MCU, up to 32 KB Flash, 1 KB Data EEPROM RTC, LCD, timers, USART, I2C, SPI, ADC, DAC, comparators Preliminary data Features • ■ Operating conditions – Operating power supply range 1.8 V to 3.6 V down to 1.65 V at power down

STM8S

Abstract: 5401 DM transistor STM8S003F3 UFQFPN20-pin PWM generation STM8s stm8s003 STM8S003K3 STM8S00 5401 DM STM8 CPU programming manual
Contextual Info: STM8S003K3 STM8S003F3 Value line, 16 MHz STM8S 8-bit MCU, 8 Kbytes Flash, 128 bytes data EEPROM, 10-bit ADC, 3 timers, UART, SPI, I²C Interrupt management Nested interrupt controller with 32 interrupts • • Up to 27 external interrupts on 6 vectors LQFP32 7x7

stm8s003

Abstract: STM8S003F3 STM8S003F STM8S003K3 5401 DM transistor UFQFPN20-pin stm8s00 5401 DM transistor equivalent 505a PWM generation STM8s
Contextual Info: STM8S003K3 STM8S003F3 Value line, 16 MHz STM8S 8-bit MCU, 8 Kbytes Flash, 128 bytes data EEPROM, 10-bit ADC, 3 timers, UART, SPI, I²C Interrupt management Nested interrupt controller with 32 interrupts • • Up to 27 external interrupts on 6 vectors LQFP32 7x7

5401 DM transistor

Abstract: stm8s00 STM8S005 STM8S005K STM8S005C6 pm0051 switching regulator ic LM 5304 stm8s005k6 UM04 transistor equivalent 505a
Contextual Info: STM8S005K6 STM8S005C6 Value line, 16 MHz STM8S 8-bit MCU, 32 Kbytes Flash, data EEPROM,10-bit ADC, timers, UART, SPI, I²C active, low consumption power-on • Permanently and power-down reset Interrupt management Nested interrupt controller with 32 interrupts

Contextual Info: STM8AL31xx STM8AL3Lxx Automotive 8-bit ultralow power MCU, up to 32 Kbytes Flash, RTC, data EEPROM, LCD, timers, USART, I2C, SPI, ADC, DAC, COMPs Datasheet - preliminary data Features • Operating conditions – Operating power supply range 1.8 V to 3.6 V down to 1.65 V at power down

STM8L151

Abstract: STM32L C 5388 STM32L15xxx Flash programming manual AR 5414 4093 ic for bcd counter STM8L151* reference timer STM32L15x STM8 CPU programming manual STM8L ADC
Contextual Info: STM8L151x4, STM8L151x6, STM8L152x4, STM8L152x6 8-bit ultralow power MCU, up to 32 KB Flash, 1 KB Data EEPROM RTC, LCD, timers, USART, I2C, SPI, ADC, DAC, comparators Features • ■ Operating conditions – Operating power supply range 1.8 V to 3.6 V down to 1.65 V at power down

dts master audio DL 1200

Abstract: ADSP-21365 CP-1201 Dolby prologic IIx decoder
Contextual Info: a SHARC Processor ADSP-21365/ADSP-21366 Preliminary Technical Data SUMMARY Single-Instruction Multiple-Data SIMD computational architecture On-chip memory—3M bit of on-chip SRAM and a dedicated 4M bit of on-chip mask-programmable ROM Code compatible with all other members of the SHARC family

AD150

Abstract: ADSP-21160 ADSP-21161 ADSP-21364 CP-1201 sharc iir filter ADSP 21364 sport control register
Contextual Info: a SHARC Processor ADSP-21364 Preliminary Technical Data SUMMARY On-chip memory—3M bit of on-chip SRAM and a dedicated 4M bit of on-chip mask-programmable ROM Code compatible with all other members of the SHARC family The ADSP-21364 is available with a 333 MHz core instruction

LM 3111

Contextual Info: STM8L052R8 Value Line, 8-bit ultralow power MCU, 64-KB Flash, 256-byte data EEPROM, RTC, LCD, timers, USART, I2C, SPI, ADC Datasheet − production data Features • ■ Operating conditions – Operating power supply: 1.8 V to 3.6 V – Temperature range: -40 °C to 85 °C

STM8L152Cx

Abstract: ic lm 9314 STM32L15x 501C LED Driver stm8l151xx LQFP32 package stm8l152c6 P 4932 UFQFPN48 MARKING 514A
Contextual Info: STM8L151x4, STM8L151x6, STM8L152x4, STM8L152x6 8-bit ultralow power MCU, up to 32 KB Flash, 1 KB Data EEPROM, RTC, LCD, timers, USART, I2C, SPI, ADC, DAC, comparators Datasheet  production data Features • ■ Operating conditions – Operating power supply range 1.8 V to