CPU MICROPROCESSOR APPLICATION Search Results

610MS

Abstract: TIMER IC 8-PIN DIP DS1819B DS1231 DS1232 DS1232LP DS1233 DS1233A DS1830 DS1233M
Contextual Info: Maxim > App Notes > Microprocessor Supervisor Circuits Keywords: microprocessor supervisor, cpu supervisor, supervisor, micromonitor, reset, watchdog, referenced comparator Sep 08, 2004 APPLICATION NOTE 3316 Maxim Microprocessor Supervisor Selection Guide

ds3600

Abstract: MAX16016 MAX16021 AN589 DS1238 DS1834 DS3650
Contextual Info: Maxim > App Notes > Microprocessor Supervisor Circuits Keywords: cpu supervisors, watchdog timer, chip enable, sense input, cpu supervisor, chip enable gating, early warning signal, watchdog, CPU Apr 18, 2002 APPLICATION NOTE 589 CPU Supervisors: Frequently Asked Questions

Z280 MPU

Abstract: Z280 Z280 CPU z280cpu z280 input id Z280 MPU input id Z80 CPU Instruction Set Z280MPU
Contextual Info: Product Specification Z280 MPU Microprocessor Unit FEATURES • Designed in CMOS for low power operations. ■ Enhanced Z80 CPU instruction set that maintains object-code compatibility with Z80 microprocessor. ■ Three-stage pipelined, 16-bit CPU architecture with user

R2000 mips

Abstract: R2000 mips processor TAG 9144 R2010 mips processor UAX-11 HP850S MIPS R2000 cache HP825S MIPS R2000
Contextual Info: LSI LOGIC R2000 High Performance RISC Microprocessor Preliminary Description Features R2000 CPU Chip Photo The R2OO0 CPU is a high speed HCMOS implemen­ tation of the MIPS RISC Reduced Instruction Set Computer microprocessor architecture. The MIPS architecture was initially developed at Stanford

F3870 Guide to Programming

Abstract: f3850
Contextual Info: F3850 FAIRCHILD Central Processing Unit CPU A Schlumberger Company Microprocessor Product Description The Fairchild F3850 is the Central Processing Unit (CPU) for the F8 8 -Bit Microprocessor family. The F3850 contains more than 70 instructions in its instruction set and operates on 8 -bit

SPARC v8 architecture BLOCK DIAGRAM

Abstract: SCCE register file
Contextual Info: TurboSPARC Microprocessor Introduction to TurboSPARC PRODUCT BRIEF SEPTEMBER 1996 The Fujitsu TurboSPARC Microprocessor is a high frequency, highly integrated single-chip CPU providing balanced integer and floating point performance. The TurboSPARC microprocessor is an implementation of

Contextual Info: Freescale Semiconductor, Inc. *’ MC146805E2 o [ Advance Information CMOS I HIGH PERFORMANCE 8-BIT MICROPROCESSOR The MCl@05E2 Microprocessor Unit Family of Microcomputers. This 8-bit microprocessor contains a CPU, on-chip low-power, low-cost processor designed

mc6805p

Abstract: MCL ML-1 M6805 05E2 MC146805E2 MC68 A8AI power semiconductor 1973 mc6805p2
Contextual Info: Freescale Semiconductor, Inc. *’ MC146805E2 o [ Advance Information CMOS I HIGH PERFORMANCE 8-BIT MICROPROCESSOR The MCl@05E2 Microprocessor Unit Family of Microcomputers. This 8-bit microprocessor contains a CPU, on-chip low-power, low-cost processor designed

300-900MHz

Abstract: sparc v8
Contextual Info: TurboSPARC Highly Integrated 32-bit RISC Microprocessor DATASHEET NOVEMBER 1996 • The Fujitsu TurboSPARC Microprocessor is a high frequency, highly integrated single-chip CPU providing balanced integer and floating point performance. The TurboSPARC microprocessor is an implementation of the SPARC

16550-compatible

Abstract: IEEE 1284 Peripheral Interface Controller IEEE1284 VR4121 IEEE-1284 P1284 VRC4172 VR41
Contextual Info: VRC4172 VR family Companion Chip for VR4121 Microprocessor Product Letter Description The VRC4172 companion chip to NEC’s VR4121 TM MIPS RISC microprocessor is designed for high-end Windows®CE Handheld PC Professional applications. The VR4121 microprocessor functions as the host CPU, while the VRC4172 supplies the SDRAM interface,

3100-CPU

Abstract: c8087 communication 8086 and 8087 S-10 S-14 S-15 S-17 s5 rack key switch controller s7 200 memory card
Contextual Info: Component Description Bulletin 3100-CPU DRC Central Processor PC Card Series A and B 3100-CPU Description The 3100-CPU Central Processor U nit Card contains both an Intel 8086 full 16-bit microprocessor and an 8087 floating point arithm etic processor. The

FF08

Contextual Info: Preliminary SPDS105B VOICE ENGINE GENERAL DESCRIPTION SPDS105B, a single chip contains an 8-bit RISC microprocessor CPU and a 16-bit digital signal processor (DSP) is applied for constituting long duration audio applications. The CPU transmits commands and data to

HB-61001

Abstract: HB-61000 prom 256x4 bit HD-4702 HD-6101 HD-6402 HD-6408 HD-6431 HM-6100 HM-6322
Contextual Info: Table 1 - CMOS Microprocessor Products D ESC R IPTIO N H A R R IS P A RT NUM BER PAGE NUMBER CPU/Controller Group H M -6 100 H D -6101 12- B it PDP - 8 /E * Microprocessor CPU Peripheral Interface Elem ent (PIE) 5-7 5-29 Table 2 - 6100 Compatible CMOS Memory Products

Contextual Info: Preliminary SPDS106A VOICE ENGINE GENERAL DESCRIPTION SPDS106A, a single chip contains an 8-bit RISC microprocessor CPU and a 16-bit digital signal processor (DSP), is applied for constituting long duration audio applications. The CPU transmits commands and data to

crt terminal interface in microprocessor

Abstract: MICRO-12 crt terminal HD-6433 HD-4702 HD-6101 harris uart HD-6408 HD-6431 HM-6322
Contextual Info: Table 1 - CMOS Microprocessor Products D ESC R IPTIO N H A R R IS P A RT NUM BER PAGE NUMBER CPU/Controller Group H M -6 100 H D -6101 12- B it PDP - 8 /E * Microprocessor CPU Peripheral Interface Elem ent (PIE) 5-7 5-29 Table 2 - 6100 Compatible CMOS Memory Products

Fujitsu FP 410

Abstract: tag 200-600 L2 300-900MHz
Contextual Info: TurboS PARC FUJITSU Highly Integrated 32-bit RISC Microprocessor DATASHEET DESCRIPTION The Fujitsu TurboSPARC Microprocessor is a high frequency, highly integrated single-chip CPU providing balanced integer and floating point performance. The TurboSPARC micro­

C790

Abstract: TX7901 Scatter-Gather 100BASE-FX 770931
Contextual Info: TX7901 MIPS RISC Microprocessor Description The TX7901 MIPS RISC microprocessor is a highly integrated solution based on the ArTile C790 core, a 128-bit internal architecture, dualissue superscalar pipeline CPU with MIPS ISA support and additional instruction enhancements developed for embedded applications.

Contextual Info: Nios 3.0 CPU January 2003, Version 2.0 Introduction f Nios 3.0 CPU Implementation Details Altera Corporation DS-NIOSCPU-2.0 Data Sheet The 3.0 version of the Nios CPU is a pipelined general-purpose RISC microprocessor. The Nios processor supports both 32-bit and 16-bit

74HC13

Abstract: sf 1565 sg 05E2 M6805 MC14 MC146805E2L TCR51 BRQ TI 7C
Contextual Info: - I Advance II Information 1 1 8-BIT MICROPROCESSOR The MCl@05E2 Family of Microprocessor Microcomputers. This Unit 8-bit belongs static and to the M6805 expandable microprocessor contains a CPU, on-chip RAM, 1/0, and TIMER. It is a low-power, low-cost processor designed for low-end to mid-range applications in the consumer, automotive,

VR4122

Abstract: VR4120 VR4121 VR4100 VRC4173 U14327EJ1V0UM00 U14327E
Contextual Info: VR4122 VR family 64-bit MIPS RISC Microprocessor Product Letter Description The 64-bit VR4122 µPD30122 microprocessor, a member of NEC’s VR Series microprocessors, uses the ultra-low-power-consuming VR4120 CPU core based on advanced 0.18 µm technology. The VR4120 CPU offers excellent performance in a compact, lowcost system on a chip. The VR4122 is also available in extended temperature range

TinyRISC

Abstract: LR4102 LSI coreware library MIPS Technologies TinyRISC EZ4102 MIPS16 R3000 TR4101 mips16 instruction set MIPS Translation Lookaside Buffer TLB R3000
Contextual Info: TinyRISC EZ4102 EasyMACRO Microprocessor Preliminary Datasheet The TinyRISC™ EZ4102 EasyMACRO subsystem is a compact, highperformance, 32-bit MIPS microprocessor subsystem implemented in LSI Logic’s G11™ technology. The EZ4102 combines the TinyRISC CPU

sunplus 1002

Abstract: SPDS102A01C 470 R2 spds105a
Contextual Info: SPDS105A VOICE ENGINE GENERAL DESCRIPTION SPDS105A, a single chip contains an 8-bit RISC microprocessor CPU and a 16-bit digital signal processor (DSP) is applied for constituting long duration audio applications. The CPU transmits commands and data to DSP by the means of memory-mapped (parallel interface). The CPU employs 23 general I/Os to access

diagram set-top-box

Abstract: AM33 IEE754 MN103E010H MN103E
Contextual Info: The most suitable for multimedia applications 32-bit Microprocessor MN103E010H „ Overview MN103E010H is a high performance general-purpose 32-bit microprocessor, which integrates Matsushitaoriginal architecture AM33 CPU core. It is suitable for various multimedia applications with its OS support mechanism such as privilege level

RC32300

Abstract: RC32364 R3052 R3081 R4640 R4650 MIPS Translation Lookaside Buffer TLB R3000 bta 137 HR08 bta 8 600
Contextual Info: RISControllerTM Embedded 32-bit Microprocessor, based on RISCore32300 RC32364TM Advance Information Integrated Device Technology, Inc. Features • High-performance embedded RISControllerTM microprocessor, based on IDT RC32300TM 32-bit CPU core - Based on MIPS-II RISC architecture with enhancements