CPU DIAGRAM Search Results

AT324

Abstract: DIVU32 80C51 DIV32 MUL16 XA User Guide AA55h
Contextual Info: 4 CPU Organization This chapter describes the Central Processing Unit CPU of the XA Core. The CPU contains all status and control logic for the XA architecture. The XA reset sequence and the system oscillator interface with the CPU, and power control is handled here. The CPU performs interrupt and

74FXX

Abstract: P702-01XC PLL702-01XC PLL702-01XCL PLL702-01XCLR PLL702-01XC-R ASIC2
Contextual Info: PLL702-01 Clock Generator for PowerPC Based Applications FEATURES • • • • • • • 1 CPU Clock output with selectable frequencies 50, 66, 75, 80, 83, 90, 100,125 or 133 MHz . 1 ASIC output clock (at CPU clock or CPU clock ÷ 2). 2 ASIC output clocks (at CPU clock) w/ output enable.

Sun Enterprise 250

Abstract: MC100LVE210 RT0201 SME5224AUPA-360 STP2202ABGA
Contextual Info: SME5224AUPA-360 July 1999 UltraSPARC -II CPU Module 360 MHz CPU, 4.0 MB E-Cache DATASHEET MODULE DESCRIPTION The UltraSPARC™–II, 360 MHz CPU, 4.0 Mbyte E-cache module, SME5224AUPA-360 delivers high performance computing in a compact design. Based on the UltraSPARC™-II CPU, this module is designed using a

Contextual Info: Freescale Semiconductor Data Sheet: Technical Data MC9S08QE32 Series Covers: MC9S08QE32 and MC9S08QE16 Features • 8-Bit HCS08 Central Processor Unit CPU – Up to 50.33 MHz HCS08 CPU at 3.6 V to 2.4 V, 40 MHz CPU at 2.4 V to 2.1 V and 20 MHz CPU at 2.1 V to 1.8 V across

SH7125

Abstract: SH7149 M3A-HS25 High-performance Embedded Workshop Renesas SH-2 128KB E10A-USB Connector d-sub
Contextual Info: SH7125 SH/Tiny CPU M3A-HS25•G50/G51 G M3A-HS25 SH7125 CPU M3A-HS25 100 SH7125 100mm I/O SH7125 E10A-USB H-UDI 14 E10A- USB M3A-HS25 M3A-HS25 M3A-HS25 * HEW High-performance Embedded Workshop SH7125 SH-2 CPU HEW 12.5MHz CPU DC 5V 出力 安定化電源 1.5A以上

osctune

Abstract: PIC18F6410 PIC18F8410
Contextual Info: PIC18F6410/8410 64/80-Pin High-Performance, Flash Microcontrollers with 10-bit A/D and nanoWatt Technology Product Brief Low-Power Features: Peripheral Highlights: • Power Managed modes: - Run: CPU on, peripherals on - Idle: CPU off, peripherals on - Sleep: CPU off, peripherals off

SC653DYB

Contextual Info: SC653 Low Cost Clock Generator for Pentium Based Designs with SDRAM Support Approved Product FREQUENCY TABLE PRODUCT FEA TURES S2 S1 so CPU PCI • Supports Pentium, Cyrix and AMD CPU’s. tristate tristate ■ 12 host CPU clocks for additional SDRAM support.

MCW D15

Abstract: ST10 TQFP-100 T11C
Contextual Info: ST10R262 16-BIT MCU WITH ON-CHIP MAC PRELIMINARY DATA • ■ ■ ■ ■ ■ ■ High Performance CPU ■ Multiply-Accumulate unit MAC ■ 16-bit CPU with 4-stage pipeline and 40ns instruction cycle time at 50-MHz CPU clock ■ Register-based architecture

0x04F2

Contextual Info: KSZ8842-PMQL 2-Port Ethernet Switch with PCI Interface Rev. 1.4 General Description The KSZ8842-series of 2-port switches includes PCI and non-PCI CPU interfaces. This datasheet describes the KSZ8842-PMQL PCI CPU interface chips. For information on the KSZ8842-MQL CPU non-PCI interface

RBS 3116

Abstract: DATA14
Contextual Info: KSZ8841-PMQL Single-Port Ethernet MAC Controller with PCI Interface Rev. 1.4 General Description The KSZ8841-series single-port chip includes PCI and non-PCI CPU interfaces. This datasheet describes the KSZ8841-PMQL with PCI CPU interface chips. For information on the KSZ8841 non-PCI CPU interface

SC653DYB

Abstract: SC653 CPU11 IMISC653DYB A3201
Contextual Info: SC653 Low Cost Clock Generator for Pentium Based Designs with SDRAM Support. Approved Product FREQUENCY TABLE PRODUCT FEATURES T T T T T T T S2 S1 S0 CPU PCI Supports Pentium, Cyrix and AMD CPU’s. tristate tristate 12 host CPU clocks for additional SDRAM

STPS2L25U

Abstract: 10BQ040 MAX1636 MAX1636CPUEVKIT MBRS130LT3 594D477X000 99279 MAX4332
Contextual Info: MAX1636 CPU Supply Evaluation Kit The MAX1636 CPU supply evaluation kit EV kit circuit is intended for converting high-voltage battery power into a low-voltage supply rail for next-generation notebook CPU cores. The output is digitally adjustable between 1.25V and 2V in 50mV increments. The input

RC32364

Abstract: LS100 plx 9080 INTEGRATED DEVICE TECHNOLOGY
Contextual Info: The RC32364 RISControllertm A Managed LAN Switch using the RC32364 RISController from IDT Integrated Device Technology BN/ cronSW. cronSW.ppt 4/7/98 1 Traditional Block Diagram Memory nd CPU 2nd Low Performance CPU Memory Control Memory Control PCI Bus Switching ASIC

x16 VRAM pga

Abstract: HC08 HCS08 MC9S08MP16
Contextual Info: Freescale Semiconductor Data Sheet: Technical Data MC9S08MP16 Series Data Sheet Features • 8-Bit HCS08 Central Processor Unit CPU – Up to 51.34 MHz CPU at 2.7V to 5.5V across temperature range of –40°C to 105°C – Up to 40 MHz CPU at 2.7V to 5.5V across temperature range

Contextual Info: bq4822Y RTC Module With 8Kx8 NVSRAM Features General Description ➤ Integrated SRAM, real-time clock, CPU supervisor, crystal, power-fail circuit, and battery The bq4822Y RTC Module is a nonvolatile 65,536-bit SRAM organized as 8192 words by 8 bits with an integral real-time clock and CPU supervisor. The CPU supervisor provides a programmable watchdog

Contextual Info: bq4822Y RTC Module With 8Kx8 NVSRAM Features General Description ➤ Integrated SRAM, real-time clock, CPU supervisor, crystal, power-fail circuit, and battery The bq4822Y RTC Module is a nonvolatile 65,536-bit SRAM organized as 8192 words by 8 bits with an integral real-time clock and CPU supervisor. The CPU supervisor provides a programmable watchdog

ZD 607

Contextual Info: Bx Notebook System Frequency Synthesizer Features PCI_F, PCI1:5 Output to Output Skew:. 500 ps • Maximized EMI suppression using Cypress’s Spread Spectrum Technology • Two copies of CPU output • Six copies of PCI output Synchronous w/CPU output

0649G

Contextual Info: ICS950805 Integrated Circuit Systems, Inc. Frequency Generator with 200MHz Differential CPU Clocks Recommended Application: CK-408 clock for Almador-M and Brookdale-Mobile chipsets. Programmable for group to group skew. Output Features: • 3 Differential CPU Clock Pairs differential current

rom 7489

Abstract: CK410 FS01 ICS9FG104 ics9fg104c
Contextual Info: ICS9FG104 Integrated Circuit Systems, Inc. Programmable FTG for Differential P4TM CPU, PCI-Express & SATA Clocks Features: • Generates common CPU frequencies from 14.318 MHz or 25 MHz • Crystal or reference input • 4 - 0.7V current-mode differential output pairs

IMISC662AAB

Abstract: SC662 sdram voltage
Contextual Info: SC662 Clock Generator for Power PC Designs with SDRAM and USB Support Preliminary Product Information FREQUENCY TABLE PRODUCT FEATURES Sel2 Sel1 Sel0 CPU PCI n Supports Pentium and Cyrix CPU’s. tristate tristate n 16 host clocks for additional SDRAM support.

UltraSPARC-IIIi

Abstract: NVRAM for Sun UltraSparc IIi UltraSPARC-III STP2003QFP 4900 H02 gigabyte MOTHERBOARD CIRCUIT diagram A27 639 SME2411 SME1430LGA-360 SME1430LGA-440
Contextual Info: SME1430LGA-360 SME1430LGA-440 SME1430LGA-480 May 1999 UltraSPARC -IIi CPU DATA SHEET Highly Integrated 64-Bit RISC; L2-Cache, DRAM, PCI Interfaces DESCRIPTION The SME1430LGA CPU UltraSPARC-IIi microprocessor is a highly-integrated, 64-bit, SPARC V9 superscalar

s08qd4

Abstract: HC08 HCS08 MC9S08QD2 MC9S08QD4 0X1802 freescale superflash
Contextual Info: MC9S08QD4 MC9S08QD2 Data Sheet HCS08 Microcontrollers MC9S08QD4 Rev. 2 01/2007 freescale.com MC9S08QD4 Series Features 8-Bit HCS08 Central Processor Unit CPU • • • • • 16-MHz HCS08 CPU (central processor unit) HC08 instruction set with added BGND instruction

MC9RS08KA4

Abstract: 948F HC08 MC9RS08KA8 RS08
Contextual Info: Freescale Semiconductor Data Sheet: Technical Data Document Number: MC9RS08KA8 Rev. 4, 6/2009 MC9RS08KA8 TBD MC9RS08KA8 Series Covers: MC9RS08KA8 MC9RS08KA4 Features: • 8-Bit RS08 Central Processor Unit CPU – Up to 20 MHz CPU at 1.8 V to 5.5 V across temperature

p8849

Abstract: S3P8849 KS88P8432 S3C8847 S3C8849 C8849
Contextual Info: S3C8847/C8849/P8849 1 PRODUCT OVERVIEW PRODUCT OVERVIEW SAM87 PRODUCT FAMILY Samsung's SAM87 family of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide range of integrated peripherals, and various mask-programmable ROM sizes. Important CPU features include: