CONTENT ADDRESSABLE MEMORY LOW POWER Search Results

tms 1035

Abstract: TDD 1605 f100145 resistor Mk2 F100142 content addressable memory "content addressable memory" search compare match current voltage
Contextual Info: fjWX National äim Semiconductor F100142 4 x 4-Bit Content Addressable Memory General Description The F100142 is a 4 word by 4-bit Content Addressable Memory CAM . Reading is accomplished when an address select input (Ao. Ay, A2, A 3) is LOW and the write strobe

a316j

Abstract: tms 374 a-316j ata 450 ws resistor Mk2
Contextual Info: F100142 4 x 4-Bit Content Addressable Memory F A IR C H IU 3 A Schlumberger Company F100K ECL Product Description The F100142 is a 4 word by 4-bit Content Addressable Memory CAM . Reading is accomplished when an address select input (Aq, A7i A2, A3) is LOW and the write

mk2 resistor

Abstract: resistor Mk2 F100145 M/F100142
Contextual Info: F A IR C H F100142 4 x 4-Bit Content Addressable Memory IL D A Schlumberger Company F100K ECL Product Description The F100142 is a 4 word by 4-bit Content Addressable M em ory CAM . Reading is accom plished when an address select input (Ag, A 7, A 2, A 3) is LOW and the write

Contextual Info: Not Intended For New Designs 100142 £3 National A Ü Semiconductor 100142 4 x 4-Bit Content Addressable Memory General Description The 100142 is a 4 word by 4-bit Content Addressable Mem­ ory CAM . Reading is accomplished when an address se­ lect input (Ao, A 7 , A 2 , A 3) is LOW and the write strobe input

tcam

Abstract: R8A20410BG renesas tcam tcam renesas renesas CAM R8A2041 Xelerated tcam TCAM chip Xelerated ternary content addressable memory
Contextual Info: 20Mbit QUAD-Search Content Addressable Memory Features & Benefits  20Mbit density Supports large routing tables and enables low-cost, low-power, more reliable system designs  360 Million Searches per Second MSPS per table Delivers the industry’s highest packet look-up

resistor Mk2

Contextual Info: F100142 4 x 4-Bit Content Addressable Memory General Description The F100142 is a 4 w ord by 4-bit C on te n t A ddressable M em ory CAM . Reading is accom plished w hen an address select input (Ao, A 7, ^ A 3) is LOW and th e w rite strobe input (W 3) is HIGH. The corresponding stored w ord appears

netlogic CAM

Abstract: "Content Addressable Memory" Netlogic Content Addressable Memory NetLogic Microsystems Priority Encoder CAM "content addressable memory" search compare 01AEH 0127H 0927H
Contextual Info: NL81480A NL82480A 1K X 64 2K X 64 Content Addressable Memory NCAM Features • • • • • • • • • 1K or 2K x 64 CAM architecture with 16-bit I/O interface Dual configuration registers for rapid context switching Readable Device ID Fast operating mode with no wait states after a no-match

content addressable memory low power

Abstract: "Content Addressable Memory"
Contextual Info: IDT 75K75150 Power Management Application Brief AN-288 Application Brief AN-288 IDT 75K75150 Power Management To request the full application note, please contact your local IDT Sales Representative or call 1-831-754-4555 Overview Application Note Topics IDT's 75K75150 provides advanced power management features

MCM69C233

Abstract: MPC8260
Contextual Info: Freescale Semiconductor, Inc. White Paper MCM69C233WP/D Rev. 2, 1/2003 Freescale Semiconductor, Inc. MPC8260 PowerQUICC IITM to CAM Interfacing – MCM69C233 Eric Jackson Technical Marketing, NCSD Networking & Computing Systems Group The purpose of this document is to provide the designer a hardware method of interfacing the

ternary content addressable memory VHDL

Abstract: ARM1020E SMART ASIC bga ARM dual port SRAM compiler Samsung ASIC 0.13um standard cell library Standard Cell 0.13um System-On-Chip ASIC DSPG samsung lcd JTAG "content addressable memory" precharge
Contextual Info: V S MSUNG STDL150 ELECTRONICS STDL150 Standard Cell 0.13um System-On-Chip ASIC March 2003, V2.0 Features Analog cores - Ldrawn = 0.13um 1.5/2.5/3.3V Device 1.5/2.5/3.3V - Up to 45.8 million gates Interface - Power dissipation: 13nW/MHz@1.5V, 2SL, ND2 5.0V

SP-353

Abstract: MCM69C433 MPC8260 EMEC SP353
Contextual Info: Freescale Semiconductor, Inc. White Paper MCM69C433WP/D Rev. 2 ,1/2003 Freescale Semiconductor, Inc. MPC8260 PowerQUICC IITM to CAM Interfacing – MCM69C433 Eric Jackson, Technical Marketing, NCSD Networking & Computing Systems Group The purpose of this document is to provide the designer a hardware method of interfacing the

Contextual Info: 74AHC259-Q100; 74AHCT259-Q100 8-bit addressable latch Rev. 1 — 22 July 2013 Product data sheet 1. General description The 74AHC259-Q100; 74AHCT259-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with

Contextual Info: 74HC259-Q100; 74HCT259-Q100 8-bit addressable latch Rev. 1 — 30 July 2012 Product data sheet 1. General description The 74HC259-Q100; 74HCT259-Q100 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL LSTTL . They are specified in compliance with

Contextual Info: 74HC259-Q100; 74HCT259-Q100 8-bit addressable latch Rev. 1 — 30 July 2012 Product data sheet 1. General description The 74HC259-Q100; 74HCT259-Q100 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL LSTTL . They are specified in compliance with

74HCT25

Contextual Info: 74HC259; 74HCT259 8-bit addressable latch Rev. 5 — 7 August 2012 Product data sheet 1. General description The 74HC259; 74HCT259 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL LSTTL . They are specified in compliance with JEDEC

Contextual Info: 74HC259; 74HCT259 8-bit addressable latch Rev. 5 — 7 August 2012 Product data sheet 1. General description The 74HC259; 74HCT259 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL LSTTL . They are specified in compliance with JEDEC

PCF8544

Abstract: PCF8810 "Philips Semiconductors" "Selection" "Guide" SO8L pcf85163 graphic lcd initialisation PCF2103 PCF8591 for RTC PCF8584 LCD based on I2C
Contextual Info: Philips Semiconductors Selection guide Display driver, real-time clock and I2C-bus peripheral ICs Display drivers — seeing is believing Our LCD drivers can be used in a broad range of telecom display applications with low power consumption requirements. Our range includes:

pci600

Abstract: PT-PCI600-10716 chipset mtbf mic connector pci600 semiconductor diode PT-PCI600 RJ45 SMT Content Addressable Memory SUPERNET AMD Supernet
Contextual Info: Features -Benefits PT-PCI600 PCI FDDI Adapter ◆ Single Slot FDDI, Dual or Single Attach DAS or SAS Allowing for concentrator connectivity or backbone configurations ◆ Available with SC, MIC (Fiber) or UTP (RJ-45) connectors Flexibility to fit into existing network

PLM51

Abstract: F800H SAB-C502 2a8h
Contextual Info: Memory Organization 3 Memory Organization The SAB-C502 CPU manipulates operands in the following four address spaces: – – – – up to 64 Kbyte of external program memory up to 64 Kbyte of external data memory 256 bytes of internal data memory a 256 x 8 area which is accessed like external RAM MOVX-instructions , called XRAM

Contextual Info: 74HC259; 74HCT259 8-bit addressable latch Rev. 03 — 8 January 2009 Product data sheet 1. General description The 74HC259; 74HCT259 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard

74AHC259

Abstract: 74AHC259D 74AHC259PW 74AHCT259 74AHCT259D 74AHCT259PW
Contextual Info: 74AHC259; 74AHCT259 8-bit addressable latch Rev. 02 — 15 May 2008 Product data sheet 1. General description The 74AHC259; 74AHCT259 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard

Xtensa

Abstract: IEEE 802.11n g.722.2 G.711.1 dsp echo pitch Atlanta-100 dsp based echo cancellation RMII to WLAN Gigabit Ethernet PHY fbga Tensilica
Contextual Info: Atlanta 1000 TM Product Brief Gigabit Communications Processor Family The Atlanta 1000 communications processor delivers wire-speed IEEE 802.11n WiFi performance and carrier-grade Voice-over-IP VoIP with the lowest power consumption and bill-ofmaterials (BOM) cost of processors in its class.

Contextual Info: 74AHC259; 74AHCT259 8-bit addressable latch Rev. 02 — 15 May 2008 Product data sheet 1. General description The 74AHC259; 74AHCT259 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard

SJA1000 application note

Abstract: 80C51 SJA1000 Philips SJA1000 standalone CAN of the Philips SJA1000 standalone CAN c P8xC591
Contextual Info: P8xC591 CAN 2.0B microcontroller Semiconductors Description The P8xC591 is a single-chip 80C51 microcontroller with an on-chip CAN controller. It uses the powerful 80C51 instruction set and includes the successful PeliCAN functionality of the SJA1000 stand-alone CAN controller.