CONSTANT K FILTER Search Results

P2462-J29

Contextual Info: SIEMENS Control ICs for Switched-Mode Power Supplies TDA 4601 ; -D Bipolar IC Features • • • • • Direct control of the switching transistor Low start-up current Reversing linear overload characteristic Base current drive proportional to collector current

Contextual Info: 47E » • ÔS3SbDS 0034502 O ■ SIEG _ S IE M SIEMENS AKTIENGESELLSCHAF E N S - Y - T v e n - v i Stereo-IF TDA5910 Preliminary Data Bipolar IC Features • • • • • Quasi-parallel sound, AM sound Average or peak AGC control Active carrier recovery with F PLL concept

5 relay 5V

Contextual Info: UC1702 UC2702 UC3702 Quad PWM Relay Driver FEATURES DESCRIPTION • Maintains Constant Average Relay Voltage With Varying Supply Voltages The UC3702 Quad Relay Driver is intended to drive up to four relays from logic inputs using an unregulated relay voltage supply. The relays are

K2049

Contextual Info: A A MK1574 Frame Rate Communications PLL icro C lock Description Features T he M K 1574-01 is a Phase-Locked Loop PLL based clock synthesizer, which accepts an 8 kH z clock input as a reference, and generates many popular communications frequencies. All outputs

Contextual Info: L M X 2 3 1 5, LM X 2320, LM X 2325 LM X2315/LM X2320/LM X2325 PLLatinum Frequency Synthesizer fo r RF PersonalCom m unications, LM X2325 2.5 GHz, LM X2320 2.0 GHz, LM X2315 1.2 GHz Te x a s In s t r u m e n t s Literature Number: SN AS101D OBSOLETE a l t Semiconductor

Contextual Info: DAC DAC8043 804 3 CMOS 12-Bit Serial Input Multiplying DIGITAL-TO-ANALOG CONVERTER FEATURES APPLICATIONS ● 12-BIT ACCURACY IN 8-PIN SOIC ● AUTOMATIC CALIBRATION ● FAST 3-WIRE SERIAL INTERFACE ● MOTION CONTROL ● LOW INL AND DNL: ±1/2 LSB max ● MICROPROCESSOR CONTROL SYSTEMS

Contextual Info: HD155008T Built-in 1.1 GHz / 460 MHz High Speed Prescaler Dual PLL Frequency Synthesizer IC HITACHI ADE-207-239 Z Preliminary, 1st. Edition November 1997 Description The HD155008T is a dual PLL frequency synthesizer IC that was developed for mobile telecommunication

ISD2500-SERIES

Abstract: ISP2500
Contextual Info: INFORMATION STORAGE b7E » • TOOBBTD GOODlEh t m «ISDI - PRELIMINARY DATA S H E E T - M j ; ; r ON

RY 485 ESA

Contextual Info: MAR 2 3 Î992 PRELIMINARY Information Storage Devices, Inc. IS D 1 0 1 2 A /1 0 1 6 A /1 0 2 0 A Single-Chip Voice Record/Playback Devices FEATURES • N a tu ral, h ig h -q u ality p lay b ack su itab le fo r v o ice , m u sic, an d to n e s • F le x ib le re c o r d a n d p la y b a ck c o n tro l o p tion s

Contextual Info: 23 H a r r is H I-5 0 4 2 /8 8 3 H I-5 0 5 0 /8 8 3 SPDT CMOS Analog Switch January 1989 Features Description • This Circuit Is Processed in Accordance to M il-S td - These CMOS analog switches offer low-resistance switching performance lo r analog voltages u p to the supply

Contextual Info: TPS40090 TPS40091 SLUS578A − OCTOBER 2003 − REVISED JUNE 2004 HIGHĆFREQUENCY, MULTIPHASE CONTROLLER FEATURES D Two-, Three-, or Four-Phase Operation D 5-V to 15-V Operating Range D Programmable Switching Frequency Up to D D D D D D D D D D DESCRIPTION

Contextual Info: FS: 11/92 Page A . 1 SIEMENSAG preliminary DATA-SHEET TUA 4300 Table of Contents ONE CHIP CAR RADIO Differences to the last edition Page O.b Table of Contents Page A.1 Functional Description, Application Page B .2. B.3 Circuit Description Page C .4. C.5

Contextual Info: TPS51116 www.ti.com SLUS609C – MAY 2004 – REVISED APRIL 2005 COMPLETE DDR AND DDR2 MEMORY POWER SOLUTION SYNCHRONOUS BUCK CONTROLLER, 3-A LDO, BUFFERED REFERENCE FEATURES • • DESCRIPTION Synchronous Buck Controller VDDQ – Wide-Input Voltage Range: 3.0-V to 28-V

Contextual Info: 82C 86H /883 f!i HARRIS CMOS Octal Bus Transceiver Ju n e 1989 P ino u ts Features 82C 86H /883 CERAMIC DIP TOP VIEW • This Circuit is Processed in Accordance to M il-S td -8 8 3 and is Fully Conform ant Under the Provisions of Paragraph 1.2.1. • Full Eight Bit Bi-directional Bus Interface

Contextual Info: ISSI IS24C16_ 16,384-BIT SERIAL ELECTRICALLY ERASABLE PROM ADVANCE INFORMATION OCTOBER 1997 FEATURES OVERVIEW • Low power CMOS - Active current less than 3.0 mA - Standby current less than 35 fiA • Hardware write protection - Write control pin

32X25

Contextual Info: TPS5110 SLVS025B − APRIL 2002 − REVISED JULY 2004 SYNCHRONOUSĆBUCK PWM CONTROLLER WITH NMOS LDO CONTROLLER DESCRIPTION FEATURES D Switching Mode Step-Down dc-to-dc D D D D D D D D D The TPS5110 provides one PWM-mode synchronous buck regulator controller SBRC and one low drop-out

Contextual Info: AV9173-15 Integrated Circuit Systems, Inc. Video Genlock PLL General Description Features The AV9173-15 provides the analog circuit blocks required for implementing a video genlock dot pixel clock generator. It contains a phase detector, charge pump, loop

Contextual Info: RTT www.ti.com bq2084-V140 DBT SLUS664A – JULY 2005 – REVISED AUGUST 2005 SBS v1.1-COMPLIANT GAS GAUGE FOR USE WITH THE bq29312 FEATURES • • • • • • • • • • • Provides Accurate Measurement of Available Charge in Li-Ion and Li-Polymer Batteries

Contextual Info: TLV320AIC26 www.ti.com SLAS412− DECEMBER 2003 LOW POWER STEREO AUDIO CODEC WITH HEADPHONE / SPEAKER AMPLIFIER AND 12ĆBIT BATTERY / TEMPERATURE / AUXILIARY ADC FEATURES D Low Power High Quality Audio Codec D Stereo Audio DAC and Mono Audio ADC D D D D D

Contextual Info: OBSOLETE MPY634 SBFS017A – DECEMBER 1995 – REVISED DECEMBER 2004 Wide Bandwidth PRECISION ANALOG MULTIPLIER FEATURES DESCRIPTION ● WIDE BANDWIDTH: 10MHz typ ● ±0.5% MAX FOUR-QUADRANT ACCURACY ● INTERNAL WIDE-BANDWIDTH OP AMP ● EASY TO USE ● LOW COST

Contextual Info: DBV 5 TPS73001, TPS73018 TPS73025, TPS73028 TPS73030, TPS73033 DBV 6 www.ti.com SBVS054C – NOVEMBER 2004 – REVISED MAY 2005 LOW-NOISE, HIGH PSRR, RF 200-mA LOW-DROPOUT LINEAR REGULATORS FEATURES • • • • • • • • • DESCRIPTION 200-mA RF Low-Dropout Regulator

G0A marking

Contextual Info: THS7001, THS7002 70-MHz PROGRAMMABLE-GAIN AMPLIFIERS SLOS214B – OCTOBER 1998 – REVISED AUGUST 1999 D D D D Separate Low Noise Preamp and PGA Stages Shutdown Control Preamp Features – Low Voltage Noise . . . 1.7 nV/√Hz – Accessible Output Pin for External

Contextual Info: THS4601 SLOS388B – OCTOBER 2001 – REVISED JUNE 2002 WIDEBAND, FET-INPUT OPERATIONAL AMPLIFIER FEATURES D Gain Bandwidth Product: 180 MHz D Slew Rate: 100 V/µs D Maximum Input Bias Current: 100 pA D Input Voltage Noise: 5.4 nV/√Hz D Maximum Input Offset Voltage: 4 mV

Contextual Info: intei 1.0 Networking Silicon — 82555 Introduction The 82555 is a highly integrated, physical layer interface solution designed for 10 and 100 Mbps Ethernet systems based on the IEEE 10BASE-T and 100BASE-TX specifications. 100BASE-TX is an IEEE 802.3 physical layer specification for use over two pairs of Category 5 unshielded twisted