COHERENCY MODULE DEBUG REGISTER Search Results

9s08dz60

Abstract: 3M05C 1M74K MC9S08DZ60 se110 AD10 HCS08 DZ60 MSCAN HCS08 an3776
Contextual Info: Freescale Semiconductor Application Note Document Number: AN3776 Rev. 0, 09/2008 MC9S08DZ60 Migrating from the 3M05C to M74K Mask Set by: D. Scott Brown Applications Engineering Microcontrollers Solutions Group Austin, TX, USA Gordon Borland Applications Engineering

TouCAN

Abstract: MC68376 MB14 Remote Controller with nine functions rx DSA0039271
Contextual Info: SECTION 13 CAN 2.0B CONTROLLER MODULE TouCAN This section is an overview of the TouCAN module. Refer to D.10 TouCAN Module for information concerning TouCAN address map and register structure. 13.1 General The TouCAN module is a communication controller that implements the controller

C288

Abstract: MPC555
Contextual Info: SECTION 7 RESET This section describes the MPC555 reset sources, operation, control, and status. 7.1 Reset Operation The MPC555 has several inputs to the reset logic which include the following: • Power on reset • External hard reset pin HRESET • External soft reset pin (SRESET)

MPC555 "limp mode" watchdog

Abstract: Motorola MPC555 C288 MPC555 613-11
Contextual Info: SECTION 7 RESET This section describes the MPC555 reset sources, operation, control, and status. 7.1 Reset Operation The MPC555 has several inputs to the reset logic which include the following: • Power on reset • External hard reset pin HRESET • External soft reset pin (SRESET)

Motorola MPC556

Abstract: mpc556 C288 MPC555 "limp mode" motorola watchdog
Contextual Info: SECTION 7 RESET This section describes the MPC555 / MPC556 reset sources, operation, control, and status. 7.1 Reset Operation The MPC555 / MPC556 has several inputs to the reset logic which include the following: • Power on reset • External hard reset pin HRESET

C288

Abstract: MPC555 MPC556 JTRS MPC555 "limp mode" watchdog
Contextual Info: SECTION 7 RESET This section describes the MPC555 / MPC556 reset sources, operation, control, and status. 7.1 Reset Operation The MPC555 / MPC556 has several inputs to the reset logic which include the following: • Power on reset • External hard reset pin HRESET

"Fiber Optic cable"

Abstract: MC68376 MB14 toucan freescale
Contextual Info: Freescale Semiconductor, Inc. SECTION 13 CAN 2.0B CONTROLLER MODULE TouCAN Freescale Semiconductor, Inc. This section is an overview of the TouCAN module. Refer to D.10 TouCAN Module for information concerning TouCAN address map and register structure.

CRC-16-CCITT

Abstract: 9S08Ac60 AN3494 CRC16-CCITT 9S08 AC60 HCS08 MC9S08AC60 MC9S08AW60 SBR12
Contextual Info: Freescale Semiconductor Application Note AN3494 Rev. 1, 04/2008 Migrating from the MC9S08AW60 to MC9S08AC60 by: Gordon Borland 8-Bit Applications Engineering Micro-Controller Division East Kilbride, Scotland 1 Introduction Freescale provides the MC9S08AC60 as a more flexible,

mmu ericsson

Abstract: powerpc dhrystone POWERPC E500 POWERPC E500 instruction set coherency module Jumbo LED MPC8540 MPC190 MPC7450 MPC8260
Contextual Info: Motorola’s e500 Integrated Host Processor Dan Bouvier Motorola Semiconductor Products Sector Somerset Architecture Manager Microprocessor Forum 2001 MPC85xx Family Design Goals • Integration of RapidIO with a high performance, low power, 1 GHz e500 processor

MPC566

Abstract: C288 MPC565
Contextual Info: SECTION 7 RESET This section describes the MPC565 / MPC566 reset sources, operation, control, and status. 7.1 Reset Operation The MPC565 / MPC566 has several inputs to the reset logic which include the following: • Power-on reset • External hard reset pin HRESET

AN2140

Abstract: HCS08 MC9S08GB60 PWM HCS08 application CHANGE PWM
Contextual Info: Freescale Semiconductor Engineering Bulletin EB656 Rev. 0.1, 08/2005 Development and Debug Limitation on MC9S08GB60 A Affects all MC9S08GB60 and MC9S08GB60A MCUs by: Jim Sibigtroth Microcontroller Division Freescale Semiconductor There are four known issues in the MC9S08GB60(A) that affect the on-chip ICE system (DBG module)

SPRAB27A

Abstract: sprug24 C6474 TCI6486 TMS320C6474 audio sender wireless Shared resource arbitration spru871 video sender
Contextual Info: Application Report SPRAB27A—August 2009 Multicore Programming Guide Communications Infrastructure and Voice/DSP Systems David Bell Greg Wood Abstract As application complexity continues to grow we have reached a limit on increasing performance by merely scaling clock speed. To meet the ever-increasing processing

corelis controller

Abstract: MIPS64 ethernet mac
Contextual Info: RM9222 Released RM9222 Integrated Multiprocessor FEATURES CACHE AND I/O COHERENCY The RM9222 Integrated Multiprocessor builds on the success of PMC-Sierra's next generation MIPS-based E9K processors by providing features specifically suited for network processing applications. It provides:

ddr ram

Contextual Info: RM9222 Preliminary RM9222 Integrated Multiprocessor FEATURES CACHE AND I/O COHERENCY The RM9222 Integrated Multiprocessor builds on the success of PMC-Sierra's next generation MIPS-based E9K processors by providing features specifically suited for network processing applications. It provides:

marvell ethernet switch

Abstract: Marvell MIPS64
Contextual Info: RM9100 Released RM9100 Integrated Microprocessor FEATURES E9000 CORE CACHE AND I/O COHERENCY PMC-Sierra’s RM9100 Integrated Processor is a high performance 64-bit MIPS -based microprocessor with integrated memory and I/O interfaces. It is a single-core version of the RM9100™

Marvell

Abstract: MIPS64 RM9100A RM9200A 64120A 64-ENTRY
Contextual Info: RM9100A Released Integrated Microprocessor FEATURES E9000 CORE CACHE AND I/O COHERENCY PMC-Sierra’s RM9100A Integrated Processor is a high performance 64-bit MIPS-based microprocessor with integrated memory and I/O interfaces. It is a single-core version of the RM9200A

MIPS64

Abstract: RM9220 "network interface cards"
Contextual Info: RM9220 Preliminary RM9220 Integrated Multiprocessor FEATURES The RM9220 Integrated Multiprocessor builds on the success of PMC-Sierra's next generation MIPS-based E9K processors by providing features specifically suited for network processing applications. It provides:

DDR PHY ASIC

Abstract: MIPS64 RM9220
Contextual Info: RM9220 Released Integrated Multiprocessor FEATURES The RM9220 Integrated Multiprocessor builds on the success of PMC-Sierra's next generation MIPS-based E9K processors by providing features specifically suited for network processing applications. It provides:

FLOATING POINT Co Processor

Contextual Info: RM9100A Released PM Integrated Microprocessor E9000 CORE CACHE AND I/O COHERENCY PMC-Sierra’s RM9100A Integrated Processor is a high performance 64-bit MIPS-based microprocessor with integrated memory and I/O interfaces. It is a single-core version of the RM9200A

Marvell

Abstract: MIPS64 RM9100A RM9200A
Contextual Info: RM9100A Released AM Integrated Microprocessor E9000 CORE CACHE AND I/O COHERENCY PMC-Sierra’s RM9100A Integrated Processor is a high performance 64-bit MIPS-based microprocessor with integrated memory and I/O interfaces. It is a single-core version of the RM9200A

Contextual Info: RM9100A Released PM Integrated Microprocessor E9000 CORE CACHE AND I/O COHERENCY PMC-Sierra’s RM9100A Integrated Processor is a high performance 64-bit MIPS-based microprocessor with integrated memory and I/O interfaces. It is a single-core version of the RM9200A

Contextual Info: RM9100A Released AM Integrated Microprocessor E9000 CORE CACHE AND I/O COHERENCY PMC-Sierra’s RM9100A Integrated Processor is a high performance 64-bit MIPS-based microprocessor with integrated memory and I/O interfaces. It is a single-core version of the RM9200A

Contextual Info: RM9224 Preliminary RM9224 Integrated Multiprocessor FEATURES CACHE AND I/O COHERENCY The RM9224 Integrated Multiprocessor builds on the success of PMC-Sierra's next generation MIPS-based E9K processors by providing features specifically suited for network processing applications. It provides:

SC3400

Abstract: sc3850 intrinsics 38448 sc38 MSC8144 MSC8151 MSC8152 MSC8156 MSC8256
Contextual Info: CodeWarrior Development Studio for StarCore DSP Architectures Simulator User Guide Revised: 19 July 2010 Freescale, the Freescale logo, and CodeWarrior are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. All other product or service names are the property of their respective owners.