CMOS N48 Search Results

SK TME 86

Abstract: SK TME 86 i on SK TME 86 i 80 SK TME 86 i 25 MPC11
Contextual Info: April 1992 Semiconductor COP404C ROMIess CMOS Microcontrollers General Description Features The COP4G4C ROMIess Microcontroller is a member of the COPS family, fabricated using double-poly, silicon gate CMOS microCMOS technology. The COP4C4C contains

COP404CN

Abstract: COP404C COP410C COP424C COP444C SE-L200 cm944 M50K 523BF 1010I
Contextual Info: COP404C National Semiconductor COP404C ROMIess CMOS Microcontrollers General Description Features The COP404C ROMIess Microcontroller Is a member of the CO PS -family, fabricated using double-poly, silicon gate CMOS microCMOS technology. The COP404C contains

hldh

Abstract: NS32081
Contextual Info: PRELIMINARY April 1987 NS32C016RT-6/NS32C016RT-10/N S32C 016RT-15 High-Performance Real-Time CMOS Microprocessors General Description Features The NS32C016RT is a 32-bit CMOS microprocessor with TTL compatible inputs, specifically configured for Real-Time

TDC1008J

Abstract: tdc1008 ADSP-1008A adsp1008 ADSP-1008
Contextual Info: 8 x 8-Bit CMOS Multiplier/Accumulator ADSP-1008A ANALOG DEVICES □ FEATURES 8 x 8-Bit Parallel Multiplication/Accumulation 50ns Multiply/Accumulate Time 200mW Power Dissipation with TTL-Compatible CMOS Technology Twos-Complement or Unsigned-Magnltude Preloadable Accumulation Registers

NS32C016D-10

Abstract: NS32082 C1995 NS32202 NS32C016-10 NS32C016-15 sample 32082 NS32081
Contextual Info: July 1989 NS32C016-10 NS32C016-15 High-Performance Microprocessors General Description Features The NS32C016 is a 32-bit CMOS microprocessor with TTL compatible inputs The NS32C016 has a 16M byte linear address space and a 16-bit external data bus It is fabricated with National Semiconductor’s advanced CMOS process

bdx 530

Abstract: COP404CN obd II stack counter binary "4 bit" 411C 425C C1995 COP400 COP404C COP410C
Contextual Info: COP404C ROMless CMOS Microcontrollers General Description Features The COP404C ROMless Microcontroller is a member of the COPSTM family fabricated using double-poly silicon gate CMOS microCMOS technology The COP404C contains CPU RAM I O and is identical to a COP444C device except the ROM has been removed and pins have been added to output the ROM address and to input the ROM data

SOT89 MARKING n43

Abstract: n33 SOT-23 n58 sot89 77 ic marking code marking n55 Marking code n15 SOT89 marking N42 N45 SOT-89
Contextual Info: UNISONIC TECHNOLOGIES CO., LTD 82NXX CMOS IC VOLTAGE DETECTORS „ DESCRIPTION The UTC 82NXX series are highly precise, low power consumption voltage detectors. Detect voltage is extremely accurate with minimal temperature drift. N-channel open drain output

marking n58

Abstract: sot-23 Marking N52 marking N52 82N50 n10 marking code sot 23 82n55 SOT89 MARKING n35 82N60 82N25 N58 SOT-89
Contextual Info: UNISONIC TECHNOLOGIES CO., LTD 82NXX CMOS IC VOLTAGE DETECTORS „ DESCRIPTION The UTC 82NXX series are highly precise, low power consumption voltage detectors. Detect voltage is extremely accurate with minimal temperature drift. N-channel open drain output

N58 SOT-89

Abstract: 82N60
Contextual Info: UNISONIC TECHNOLOGIES CO., LTD 82NXX CMOS IC VOLTAGE DETECTORS  DESCRIPTION 2 The UTC 82NXX series are highly precise, low power consumption voltage detectors. Detect voltage is extremely accurate with minimal temperature drift. N-channel open drain output

XC6200

Abstract: BUF C038 XC6264 xilinx XC6216 PN16 XC6209 XC6216 PW16 XC6000 N16O
Contextual Info: XC6200 FPGA Family  Advanced Product Description Features • Flexible Pin Configuration - All User I/O’s programmable as in, out, bidirect, tristate or open drain. - Configurable pull-up/down resistors - CMOS or TTL logic levels - 8.32-bit CPU interface

SOT-23 MARKING N55

Abstract: SOT89 MARKING n35 SOT89 MARKING N40 SOT89 MARKING n43 N54 SOT-23 N58 SOT-89 MARKING N52 SOT 6 Marking code n15 SOT89 device marking N52 MARKING N46
Contextual Info: UNISONIC TECHNOLOGIES CO., LTD 82NXX CMOS IC VOLTAGE DETECTORS 4 3 „ DESCRIPTION 2 The UTC 82NXX series are highly precise, low power consumption voltage detectors. Detect voltage is extremely accurate with minimal temperature drift. N-channel open drain output

Ca 4106

Abstract: PWM 3263
Contextual Info: DS8187 S3 National Æ M Semiconductor DS8187 Vacuum Fluorescent Display Driver General Description Features The DS8187 is a vacuum fluorescent display tube driver. This device is implemented in CMOS technology, to provide high voltage output drivers and low power. Dimming may be

Contextual Info: UNISONICTECHNOLOGIESCO., LTD 82NXX CMOS IC V OLT AGE DET ECT ORS 4 3 5 ̈ DESCRI PT I ON 2 The UTC 82NXX series are highly precise, low power consumption voltage detectors. Detect voltage is extremely accurate with minimal temperature drift. N-channel open drain output

sqfp 14x20

Abstract: 74ALSXX P51XA-G3 OTP-e PC 74 HCT 32 P sQFP 14X14 TDA1308 equivalent SG 2368 tqfp 14x14 tray TDA1308 application notes
Contextual Info: Philips Semiconductors Product specification Class AB stereo headphone driver TDA1308 FEATURES GENERAL DESCRIPTION • Wide temperature range The TDA1308 is an integrated class AB stereo headphone driver contained in an SO8 or a DIP8 plastic package. The device is fabricated in a 1 mm CMOS process and has

0044300

Abstract: ATL60 P102 3-input NAND gate
Contextual Info: NAN2 ATL60 CMOS Gate Array cell data sheets 3.3 DESCRIPTION: 2 input NAND Truth Table: A B | O -0 X | 1 X 0 | 1 1 1 | 0 at60Cells B NAN2 O A VDD! p VDD! p P4 P13 O n B N3 n A N10 VSS! / $Revision: 1.27 $

ATL35

Abstract: P102 truth table nand gate
Contextual Info: NAN2 ATL35 CMOS Gate Array cell data sheets 1.0 DESCRIPTION: 2-input NAND Truth Table: A B | O -0 X | 1 X 0 | 1 1 1 | 0 ATL55Cells B NAN2 O A VDD! p VDD! p P4 P13 O n B N3 n A N10 VSS! / $Revision: 1.35 $

C1995

Abstract: DS8187 DS8187N N48A
Contextual Info: DS8187 Vacuum Fluorescent Display Driver General Description Features The DS8187 is a vacuum fluorescent display tube driver This device is implemented in CMOS technology to provide high voltage output drivers and low power Dimming may be accomplished by either analog or digital input Autoload capability is accomplished by connecting the DATA OUT pin to

Contextual Info: Logic Cell A rray M 2 0 6 4 /M 2 0 1 8 Features/Benefits • CMOS programmable Logic Cell Array LCA for replacement of standard logic • Completely reconfigurable by the user in the final system • High performance equivalent to TTL SSI/MSI - 33 MHz flip-flop toggle rate (-33 speed grade)

LC7821

Abstract: 48635 IC LC7821 8923K ILC03166 ILC03167 ILC03168 ILC03169 ILC03170 ILC03171
Contextual Info: 注文コード No. N 4 8 6 3 A LC7536R N4863A 31506 半導体ニューズ No.N4863 とさしかえてください。 LC7536R CMOS LSI 高耐圧シリアルコントロール電子ボリウム LC7536R はボリウム , バランスの各機能を少ない外付部品で電子コントロールできる電子ボリウムである。

1N1106

Abstract: LC75822 LC75821 N1106 D106 LC75822E LC75822W 10X10 14X14 SQFP64
Contextual Info: LC75822E, 75822W 注文コード No. N 4 8 0 0 D 三洋半導体データシート 半導体ニューズ No. N4800C をさしかえてください。 LC75822E, LC75822W CMOS LSI LCD 表示ドライバ LC75822E, 75822W はコントローラによる制御で電子同調の周波数表示などに使える汎用 LCD 表示ドライバである。

P103

Abstract: P133 ATL60 N132 MUX8n 0020700 P107N 08155 PP201 1251-1-1
Contextual Info: MUX2 ATL60 CMOS Gate Array cell data sheets 3.3 DESCRIPTION: 2:1 MUX Truth Table: S | O -0 | I0 1 | I1 at60Cells S MUX2 I0 O I1 VDD! p P14 S n N3 VSS! VDD! p P20 p P23 I0 VDD! n N6 N22 n p P32 VSS! O n VDD! N34 p P16 p P21 I1 n N25 VSS! VDD! N29

N136

Abstract: n133 MUX8n ATL35 N132 P103 P133 023632 P107N N144
Contextual Info: MUX2 ATL35 CMOS Gate Array cell data sheets 1.0 DESCRIPTION: 2:1 MUX Truth Table: S | O -0 | I0 1 | I1 ATL55Cells S MUX2 I0 O I1 VDD! p P14 S n N3 VSS! VDD! p P20 p P23 I0 VDD! n N6 N22 n p P32 VSS! O n VDD! N34 p P16 p P21 I1 n N25 VSS! VDD! N29

P62d

Abstract: ATL60 1147-000
Contextual Info: LAT ATL60 CMOS Gate Array cell data sheets 3.3 DESCRIPTION: LATCH Truth Table: H D | Q T+1 -0 0 | 0 1 | 1 1 X | Q(T) at60Cells H LAT D Q VDD! VDD! p P58 p P53 p P62 D Q n n N59 N52 N63 n VSS! VSS! VDD! N56 n p P57 p P65 VDD! n VDD!

P30 CORE N48

Abstract: n38n ATL35 latr CMOS GATE ARRAY
Contextual Info: LAT ATL35 CMOS Gate Array cell data sheets 1.0 DESCRIPTION: LATCH Truth Table: H D | Q T+1 -0 0 | 0 1 | 1 1 X | Q(T) ATL55Cells H LAT D Q VDD! VDD! p P58 p P53 p P62 D Q n n N59 N52 N63 n VSS! VSS! VDD! N56 n p P57 p P65 VDD! n VDD!