CMLB Search Results

LOW FORWARD VOLTAGE DROP DIODE BRIDGE

Abstract: four diode full wave rectifier high voltage high current bridge rectifier diode rectifier 10ma DSA00314532 marking 6 bridge diode CMLB6263 marking code AC B 50 bridge rectifier marking .A sot -6
Contextual Info: CMLB6263 PICOmini HIGH VOLTAGE SCHOTTKY BRIDGE RECTIFIER Central TM Semiconductor Corp. FEATURES: • HIGH VOLTAGE 70V • LOW FORWARD VOLTAGE MARKING CODE: 63B SOT-563 CASE DESCRIPTION: The Central Semiconductor CMLB6263 incorporates four, high voltage, low VF Schottky diodes

application ds92001

Abstract: DS92001TMA
Contextual Info: DS92001 DS92001 3.3V B/LVDS-BLVDS Buffer Literature Number: SNLS147E DS92001 3.3V B/LVDS-BLVDS Buffer General Description The DS92001 B/LVDS-BLVDS Buffer takes a BLVDS input signal and provides a BLVDS output signal. In many large systems, signals are distributed across backplanes. One of

ADSP-21489 user manual

Abstract: ADSP-21487 sharc ADSP-214xx FFT Accelerator medialb ADSP-21160 ADSP-21161 ADSP-21489 ADSP21487 sharc iir filter IBIS Model diode
Contextual Info: SHARC Processor SUMMARY The ADSP-2148x processors are available with unique audiocentric peripherals, such as the digital applications interface, serial ports, precision clock generators, S/PDIF transceiver, asynchronous sample rate converters, input

JESD204A

Abstract: WIDEBAND ULTRASOUND CMLAN
Contextual Info: NXP dual 12/14-bit ADC with serial interface ADC1x13 Dual-channel ADCs with JESD204A-compliant outputs for wireless and industrial Equipped with 3.125-Gbps serial output interfaces that comply with JEDEC JESD204A, these dual-channel ADCs support sample rates up to 125 MSPS, integrate a programmable gain buffer,

Contextual Info: DAC1653Q/DAC1658Q Quad 16-bit DAC: 10 Gbps JESD204B interface: x2, x4 and x8 interpolating Advance data sheet Revision 2.3.1 1. GENERAL DESCRIPTION DAC1653Q and DAC1658Q are high-speed, high-performance 16-bit quad channel Digital-to-Analog Converters DACs .

92001

Contextual Info: DS92001 www.ti.com SNLS147F – JUNE 2002 – REVISED APRIL 2013 DS92001 3.3V B/LVDS-BLVDS Buffer Check for Samples: DS92001 FEATURES DESCRIPTION • • The DS92001 B/LVDS-BLVDS Buffer takes a BLVDS input signal and provides a BLVDS output signal. In many large systems, signals are distributed across

msf 38.9

Abstract: key board mtm 8 pins
Contextual Info: SHARC Processor ADSP-21478/ADSP-21479 SUMMARY The ADSP-2147x processors are available with unique audiocentric peripherals, such as the digital applications interface, serial ports, precision clock generators, S/PDIF transceiver, asynchronous sample rate converters, input

ADSP-21489

Abstract: ADSp-2148x ADSP-21489KSWZENGB share iir 21489 ADSP-21487 ADSP-21486KSWZENGB sharc iir filter 21489
Contextual Info: SHARC Processor ADSP-21483/21486/21487/21488/21489 Preliminary Technical Data SUMMARY Qualified for Automotive Applications. See Automotive Products on Page 64 Code compatible with all other members of the SHARC family The ADSP-2148x processors are available with unique audiocentric peripherals such as the digital applications

ADSP-21160

Abstract: ADSP-21478 ADSP-21479 21479 adsp-21479 modulation sharc processor programming reference ADSP-21479W
Contextual Info: SHARC Processor ADSP-21478/ADSP-21479 Preliminary Technical Data SUMMARY Qualified for Automotive Applications . See Automotive Products on Page 69 Code compatible with all other members of the SHARC family The ADSP-2147x processors are available with unique audiocentric peripherals such as the digital applications

Contextual Info: DS92001 www.ti.com SNLS147F – JUNE 2002 – REVISED APRIL 2013 DS92001 3.3V B/LVDS-BLVDS Buffer Check for Samples: DS92001 FEATURES DESCRIPTION • • The DS92001 B/LVDS-BLVDS Buffer takes a BLVDS input signal and provides a BLVDS output signal. In many large systems, signals are distributed across

NetSilicon

Abstract: NetSilicon net 50 NET50
Contextual Info: NET+50 32-Bit Ethernet System-on-Chip for Device Networking Best price/performance 32-bit Ethernet 8KB on-chip cache Expanded GPIO Features • 32-bit high-performance ARM7 TDMI RISC processor • Integral 10/100BaseT Ethernet MAC • 8KB internal cache qÜÉ=kbqHRM=áë=~=äçï=ÅçëíI ÜáÖÜJéÉêÑçêã~åÅÉ=POJÄáí

tma price

Contextual Info: DS92001 www.ti.com SNLS147F – JUNE 2002 – REVISED APRIL 2013 DS92001 3.3V B/LVDS-BLVDS Buffer Check for Samples: DS92001 FEATURES DESCRIPTION • • The DS92001 B/LVDS-BLVDS Buffer takes a BLVDS input signal and provides a BLVDS output signal. In many large systems, signals are distributed across

HLQFN56R

Abstract: 0819H sot935
Contextual Info: ADC1443D series Dual channel 14-bit ADC; 125, 160 or 200 Msps; JESD204B-compliant CGVxpress serial outputs Rev. 3.4 — 10 October 2012 Data sheet 1. General description The ADC1443D is a dual channel 14-bit Analog-to-Digital Converter ADC with JESD204B interface (which is backward compatible with the JESD204A interface)

27MHZ rc receiver

Abstract: 27mhz rc circuit BT.709 GO1555 27mhz receiver GS4911 1125-line 240M-1999 1hz clock generator 5501 7 segment
Contextual Info: GS4915 ClockCleaner GS4915 Data Sheet Key Features Description • Reduces jitter for clocks of 148.5MHz, 148.5/1.001MHz, 74.25MHz, 74.25/1.001MHz and 27MHz • Output jitter as low as 20ps peak to peak The GS4915 provides a low jitter clock output when fed

Contextual Info: ADC1453D series Dual 14-bit ADC; 160 or 250 Msps; JESD204B serial outputs Rev. 3.0 — 15 November 2013 Advanced data sheet 1. General description The ADC1453D is a dual channel 14-bit Analog-to-Digital Converter ADC with JESD204B interface (which is backward compatible with the JESD204A interface)

Contextual Info: ADC1443D series Dual 14-bit ADC; 125, 160 or 185 Msps; JESD204A/B serial outputs Rev. 4.2 — 15 March 2013 Product data sheet 1. General description The ADC1443D is a dual channel 14-bit Analog-to-Digital Converter ADC with JESD204B interface (which is backward compatible with the JESD204A interface)

Contextual Info: ADC1213D065/080/105/125 Dual 12-bit ADC; 65, 80, 105 or 125 Msps Rev. 02 — 4 June 2009 Objective data sheet 1. General description The ADC1213D is a dual channel 12-bit Analog-to-Digital Converter ADC optimized for high dynamic performances and low power at sample rates up to 125 Msps. Pipelined

SCR FLAT HD

Abstract: JEDEC204 ADC02
Contextual Info: ADC1413D065/080/105/125 Dual 14 bits ADC; 65, 80, 105 or 125 Msps; serial JESD204A interface Rev. 01 — 28 May 2009 Objective data sheet 1. General description The ADC1413D is a dual channel 14-bit Analog-to-Digital Converter ADC optimized for high dynamic performances and low power at sample rates up to 125 Msps. Pipelined

Contextual Info: IAL/CEL/LEL Series Magnetic Circuit Protectors Introduction • 133 Poles • 134 Handles • 136 Configurations • 140 Operating Characteristics • 143 Delay Curves • 145 Specifications • 149 Decision Tables • 151 IAL/CEL/LEL Series Hydraulic Magnetic Circuit Protectors

Contextual Info: ADC1453D250 Dual 14-bit ADC; up to 246 Msps; JESD204B serial outputs Rev. 3.2 — 6 June 2014 Preliminary data sheet 1. General description The ADC1453D is a dual channel 14-bit Analog-to-Digital Converter ADC with JESD204B interface (which is backward compatible with the JESD204A interface)

adcb 27

Abstract: JESD204A ADC ic 0808 pin diagram CMLB
Contextual Info: ADC1413D065/080/105/125 Dual 14 bits ADC; 65, 80, 105 or 125 Msps; serial JESD204A interface Rev. 02 — 4 June 2009 Objective data sheet 1. General description The ADC1413D is a dual channel 14-bit Analog-to-Digital Converter ADC optimized for high dynamic performances and low power at sample rates up to 125 Msps. Pipelined

adcb 27

Abstract: JESD204A ADC ic 0808 pin diagram
Contextual Info: ADC1213D065/080/105/125 Dual 12-bit ADC; 65, 80, 105 or 125 Msps Rev. 02 — 17 June 2009 Objective data sheet 1. General description The ADC1213D is a dual channel 12-bit Analog-to-Digital Converter ADC optimized for high dynamic performances and low power at sample rates up to 125 Msps. Pipelined

sdc 339 PWM

Abstract: adsp-2146 medialb
Contextual Info: SHARC Processor ADSP-21478/ADSP-21479 Preliminary Technical Data SUMMARY Qualified for Automotive Applications . See Automotive Products on Page 69 Code compatible with all other members of the SHARC family The ADSP-2147x processors are available with unique audiocentric peripherals such as the digital applications

F001B

Contextual Info: Anschlussarten 85.2 "°-2 Terminal Type 1- 0,1 FLachstEckEr A 6,3 x 0,8 Slip-on tabs DIN 46244 P 10 x 7,62 = 7 6,2 L = AnschLussLnngE L - Terminal Length \ |fc"M ' l' n^f-n 4J=oL_LL - 1II "t 'Ì F F001 = FLachstEckEr 6,3 x 0,8 F001 = Slip-on tabs 6,3 x 0,8