CML ECL COMPATIBLE Search Results

SH100E

Abstract: siemens SH100E elxr siemens Nand gate SH100E5 TRANSISTOR K 2191
Contextual Info: 7 1991 SIEMENS ASIC Product Description SH100E ECL/CML Gale Amy Family FEATURES • Gate complexities from 1,500 to 16,000 gates ■ 120 ps gate delay, 90 ps differential • 1.5 GHz D flip-flop, 1.7 GHz differential ■ Both ECL and CML macro families ■ TTL I/O available

485G

Abstract: NB7L32M MARKING 224 QFN-16
Contextual Info: NB7L32M 2.5V/3.3V, 14GHz ÷2 Clock Divider w/CML Output and Internal Termination Descriptions The NB7L32M is an integrated ÷2 divider with differential clock inputs and asynchronous reset. Differential clock inputs incorporate internal 50 W termination resistors and accept LVPECL Positive ECL , CML, or LVDS. The

Contextual Info: NB7L32M 2.5V/3.3V, 14GHz ÷2 Clock Divider w/CML Output and Internal Termination Description The NB7L32M is an integrated ÷2 divider with differential clock inputs and asynchronous reset. Differential clock inputs incorporate internal 50 W termination resistors and accept LVPECL Positive ECL , CML, or LVDS. The

Contextual Info: NB7L32M 2.5V/3.3V, 14GHz ÷2 Clock Divider w/CML Output and Internal Termination Description The NB7L32M is an integrated ÷2 divider with differential clock inputs and asynchronous reset. Differential clock inputs incorporate internal 50 W termination resistors and accept LVPECL Positive ECL , CML, or LVDS. The

485G

Abstract: NB7L32M
Contextual Info: NB7L32M 2.5V/3.3V, 14GHz ÷2 Clock Divider w/CML Output and Internal Termination Description The NB7L32M is an integrated ÷2 divider with differential clock inputs and asynchronous reset. Differential clock inputs incorporate internal 50 W termination resistors and accept LVPECL Positive ECL , CML, or LVDS. The

package marking 504c

Abstract: ICS853S 853S310CVILF
Contextual Info: Low Skew, 1-to-8 Differential-to3.3V LVPECL/ECL Fanout Buffer ICS853S310I DATA SHEET General Description Features The ICS853S310I is a low skew, high performance 1-to-8 Differential-to-3.3V LVPECL/ECL Fanout Buffer. The PCLKx, nPCLKx pairs can accept LVPECL, LVDS, CML and SSTL

Contextual Info: Low Skew, 1-to-8 Differential-to3.3V LVPECL/ECL Fanout Buffer ICS853S310I DATA SHEET General Description Features The ICS853S310I is a low skew, high performance 1-to-8 Differential-to-3.3V LVPECL/ECL Fanout Buffer. The PCLKx, nPCLKx pairs can accept LVPECL, LVDS, CML and SSTL

CX60077

Abstract: dense wavelength division multiplexer
Contextual Info: Network Access Division Data Sheet CX60077 2.5 Gbps Long Haul Laser Driver Key Features Applications • • • • • • • • • • Single supply : -5.2 Volts CML interface with capability of receiving ECL level Low power consumption ≤ 400 mW

PULSE WIDTH MODULATION CONTROL CIRCUIT

Contextual Info: 19-4803; Rev 0; 4/01 10.7Gbps EAM Driver Features ♦ Single -5.2V Power Supply The MAX3935 accepts differential ECL or ground-referenced CML clock and data-input signals. Inputs are terminated with on-chip 50Ω resistors. An input-data retiming latch can be used to reject input-patterndependent jitter if a clock signal is available.

MAX3910

Abstract: MAX3935 MAX3935EGJ STM-64
Contextual Info: 19-4803; Rev 0; 4/01 10.7Gbps EAM Driver Features ♦ Single -5.2V Power Supply The MAX3935 accepts differential ECL or ground-referenced CML clock and data-input signals. Inputs are terminated with on-chip 50Ω resistors. An input-data retiming latch can be used to reject input-patterndependent jitter if a clock signal is available.

SY87702LHI

Contextual Info: 3.3V 28Mbps-2.5Gbps AnyRate CLOCK AND DATA RECOVERY FEATURES SY87702L FINAL DESCRIPTION • 3.3V power supply ■ Complies with Bellcore, ITU/CCITT and ANSI specifications for applications such as OC-1, OC-3, OC-12, OC-48*, and ATM ■ Compatible with FDDI, Gigabit Ethernet, Fibre

Contextual Info: 3.3V 28Mbps-2.5Gbps AnyRate CLOCK AND DATA RECOVERY FEATURES PRELIMINARY SY87702L DESCRIPTION • 3.3V power supply ■ Complies with Bellcore, ITU/CCITT and ANSI specifications for applications such as OC-1, OC-3, OC-12, OC-48*, and ATM ■ Compatible with FDDI, Gigabit Ethernet, Fibre

SY87702L

Abstract: SY87702LHG SY87702LHI SY87702LHITR SY87721L
Contextual Info: Micrel, Inc. 3.3V 28Mbps-2.5Gbps AnyRate CLOCK AND DATA RECOVERY FEATURES SY87702L SY87702L DESCRIPTION • 3.3V power supply ■ Complies with Bellcore, ITU/CCITT and ANSI specifications for applications such as OC-1, OC-3, OC-12, OC-48*, and ATM ■ Compatible with FDDI, Gigabit Ethernet, Fibre

ANSI C39.1

Abstract: R20 marking SY87702LHITR SY87702L SY87702LHG SY87702LHGTR SY87702LHI SW DIP5 SY87702LH
Contextual Info: Micrel, Inc. 3.3V 28Mbps-2.5Gbps AnyRate CLOCK AND DATA RECOVERY FEATURES SY87702L SY87702L DESCRIPTION • 3.3V power supply ■ Complies with Bellcore, ITU/CCITT and ANSI specifications for applications such as OC-1, OC-3, OC-12, OC-48*, and ATM ■ Compatible with FDDI, Gigabit Ethernet, Fibre

transistor a473

Abstract: A473 transistor conhex chip die npn transistor CML ECL compatible
Contextual Info: HONEYWELL "DIGITAL PRODUCT bt. dË | MSS1M5B ODOOOEt. T f' T-42-11-13 MARCH 1985 ECL GATE ARRAY HE2000 PRODUCT DESCRIPTION The HE2000 Gate Array Figure 1 is a 300 picosecond, 2000 equivalent gate density Very Large Scale Integration (VLSI) monolithic integrated circuit built using Honeywell’s

A473 transistor

Abstract: transistor a473 A473 CML termination 50 Ohm external termination volt HE2000
Contextual Info: MARCH 1985 HE2000 ECL GATE ARRAY PRODUCT DESCRIPTION The HE2000 Gate Array Figure 1 is a 300 picosecond, 2000 equivalent gate density Very Large Scale Integration (VLSI) monolithic integrated circuit built using Honeywell’s ADB-II fabrication process. The array is composed of an

64 PIN CERDIP

Contextual Info: HONEYWELL DIGITAL PRODUCT bb D E * 4SS14S3 0000050 b • ■ ■ RAD HARD ECL/TTL GATE ARRAY PRODUCT DESCRIPTION The HM1000R Gate Array Figure 1 is an 800 pico­ second, 1000 equivalent gate density LSI monolithic integrated circuit built using Honeywell’s radiation

HP83000

Abstract: LI-300 Signal Path designer FLIP FLOP toggle
Contextual Info: O V A t f k ln f lf A ll Lig h tn in g Series - LI300, LI1000 m m tM m jrtm . W % S m m Ultrahigh-Speed GaAs Gate Arrays Features Figure 1 Photomicrograph of the Lightning LI300 array • Advanced HBT GaAs process for high performance • Two array sizes: 300 or 1000 equivalent gates

L42n

Abstract: HM3500 adb 630 L43n "alu 4 bit" ECL IC NAND L44N PT06-16-8P-S/transistor 03e
Contextual Info: H0NEYWE1_I_/SS ELEK-, MIL [13 I>e | 4551872 DD00212 D • “ H o n eyw e ll r - n - ll'O HM3500, hvmioooo, HE12000 Preliminary ADVANCED DIGITAL BIPOLAR GATE ARRAY FAMILY FAMILY FEATURES • Broad Performance Optimized Family Allows Flexible System Partitioning:

KSZ8041

Abstract: LM2576 MTBF vcsel spice model MIC4129 mic44r22 ksz8692 MICREL MIC marking DFB laser diode spice model KSZ9021RLI KSZ8041TLI
Contextual Info: Military Catalog May 2009 Dear Valued Customer, Micrel is an enduring DSCC certified company that has, for many years, provided Mil-Std-883B products in hermetic ceramic packages. We have also provided products governed by source controlled drawings SCD where baseline control is important. Our in-house, U.S.-based wafer

mic5380

Abstract: nu-horizons KSZ8863 KSZ8863MLL KSZ9021RN PQFP-128 footprint KSZ8863MLL EVAL KSZ8851SNL SFP EVAL BOARD MIC26950
Contextual Info: Shortform Catalog July 2010 Shortform Catalog July 2010 2010 Micrel, Inc. The information furnished by Micrel, Inc., in this publication is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use, nor any infringements of patents

Contextual Info: H OlM EYüJELL/SS ELEK-, M IL 03 D Ë| 4551Ö72 DDGG3].t □ T -9 2 -//-Û 7 Honeywell Radiation Hardened Bipolar Gate Array Family " Preliminary HM3500R, HVM10000R Family Features • Strategic Radiation Hardness Allows Spaced Based System Operations • Broad Performance Optimized Family Allows Flexible

ksz8863 EVAL BOARD

Abstract: KSZ8863 nu-horizons KSZ9021RLI KSZ8041NLI KSZ9021GN transistors sot-223 06a KS8995MA ksz9021rl MIC3201
Contextual Info: Shortform Catalog February 2010 Shortform Catalog February 2010 2010 Micrel, Inc. The information furnished by Micrel, Inc., in this publication is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use, nor any infringements of patents

QFN-16

Abstract: SUBCC qfn16 CML ECL termination NBSG14
Contextual Info: Enabling Energy Efficient Solutions Product Overview Created on: 10/26/2011 NBSG14: 2.5 V / 3.3 V SiGe 1:4 Differential Clock/Data Fanout Buffer with RSECL Outputs For complete documentation, see the data sheet Product Description The NBSG14 is a 1-to-4 clock/data distribution chip, optimized for ultra-low skew and jitter.