CLOCKED RS FLIP FLOP Search Results

SP1666

Contextual Info: SP1666 SP1666 DUAL CLOCKED R-S FLIP-FLOP Two S e t-R e s e t f lip -f lo p s in a sin g le p ackage w h ic h re q u ire a c lo c k in p u t to e n a b le th e s e t-re se t in p u ts . In te r n a l in p u t p u ll-d o w n resisto rs e lim in a te th e need

10h131

Contextual Info: MC10H131 Dual D Type Master-Slave Flip-Flop The MC10H131 is a MECL 10H part which is a functional/pinout duplication of the standard MECL 10K family part, with 100% improvement in clock speed and propagation delay and no increase in power–supply current.

JK flipflop 9001

Abstract: 9022dc DTL9932 9020DC TTL 9020 9000DC 9000DM 9000FC 9000FM 9001FC
Contextual Info: 9XXX Series CONNECTION DIAGRAMS P IN O U T A 9000 • 9001 9020 • 2222Jw ' ° r\ i f . v JK FLIP-FLOPS COO, ’01 DUAL JK FLIP-FLOPS ’20, ’22) 14] Vcc O R D E R IN G C O D E: See Section 9 PIN PKQS Ceram ic U IP ( D) Flatpak IP) OUT MILITARY GRADE

MC1013

Abstract: MC1213 MC314 "J-K Flip flops" AN-280 J-K Flip flops
Contextual Info: s 85-MHz AC COUPLED J-K FLIP-FLOPS \ M ECL II MC 1 0 0 0/1200 series MC1013 MC1213 Designed for use at clock frequencies to 70 MHz minimum 85 M Hz typical . Logic performing inputs (J and K) are available, as well as dc S ET and RESET inputs. POSITIVE LOGIC

JK flip flop IC

Abstract: RS flip flop IC 9022 ic 9022 JK flipflop 9001 toggle type flip flop ic 9022DC
Contextual Info: 9XXX Series CONNECTION DIAGRAMS PINOUT A 90 0 0 • 9001 9 ^ 9 0 2 0 X • 9022 JK FLIP-FLOPS COO, ’01 DUAL JK FLIP-FLOPS ’20, ’22) T— T PKGS OUT Ceramic DIP <D> Flatpak (F) COMMERCIAL GRADE MILITARY GRADE Vcc = +5.0 V ±5%, Ta = 0 “C to +75° C

Contextual Info: H D 10131 Dual D-type Master-Slave Flip Flops The H D 1 0 1 3 1 is a dual master-slave type D flip -flo p . Asynchronous Set S and Reset(R) override C lo c k (C c ) and Clock I PIN ARRANGEMENT Enable(CE) inputs. Each flip -flo p m ay be clocked separately by holding the

clocked RS flip flop

Contextual Info: APR 2« iS«? PARADIGM P R E L IM IN A R Y CMOS HIGH SPEED SYNCHRONOUS FIFOS 256 X 18-BIT TO 1024 X 18-BIT 256X18 512X18 1024X18 PDM42205 PDM 42215 PDM42225 FEATURES • • • • • • • 256 x 18 through 1024 x 18 FIFO Family Clock Synchronous Interface for High Speed

MC945

Abstract: MC1741C MC1741CP1 MCC1741C MCC830 MCC831 MCC832 MCC930 MCC931 mdtl logic chips
Contextual Info: LIN EA R IN T EG R A T ED C IR C U IT CHIPS G E N E R A L D E S C R IP T IO N M o to r o la n o w o ffe rs a ve ry b ro a d se le c tio n o f lin e a r integ rated c ir c u it c h ip s . A m o n g th e ty p e s o f c ir c u its w h ic h c o m p o se th e lin e a r f a m ily th e re are:

MC663

Abstract: mOTOROLA mhtl
Contextual Info: M O TO R O LA SC { L O G IC * DUAL J-K FLIP-FLOP E : 5 i j b 3 t,7 2 5 E OQf l D a 4 S ^ 4 J ^ D M H T L M C 6 6 0 series MC663 MC12663 j _ MOTOROLA -j-i - i/z i b -oi-oi, Q K RD Q |SS JE A The MC663 and the MC12663 consist o f two J-K flip-flops having

Contextual Info: Paradigm' bTMlQ'îQ 0 0 0 G 4 Û 3 GSfl « P A T 2048 x 18: PDM42235 4096 x 18: PDM42245 CMOS High Speed Synchronous FIFOs 2048 x 18-Bit to 4096 x 18-Bit Features Description □ High speed access times Com'l: 1 0 ,1 5 ,2 0 ,2 5 ,3 0 ,3 5 ,5 0 ns Mil: 1 5 ,2 0 ,2 5 ,3 0 ,5 0 ns

MC3140

Abstract: MC3060 MC3160L motorola MC3060 TWT Wiring DSP56002 MC3060F MC3060L MC3160 MC3160F
Contextual Info: I ?• r D U A L TY PE D FLIP-FL O P \ M TTL III M C3100/3000 series MC3160F • MC3060F MC3I60L • MC3060L,P I Thw dual flip -flo p trigpers on th * positive edge of th * dock and performs the Type O flip-flop logic function. This davic* consists o f tw o completely inde­

Contextual Info: ATV2500B Features • High Performance, High Density Programmable Logic Device Typical 7 ns Pin-to-Pin Delay Fully Connected Logic Array With 416 Product Terms Flexible Output Macrocell 48 Flip-Flops - Two per Macrocell 72 Sum Terms All Flip-Flops, I/O Pins Feed In Independently

Contextual Info: 256 x 18: PDM42205 5 1 2 x 1 8 : PDM42215 1024x18: PDM42225 Paradigm ' b^m o^D DDOOMbö a m m p k i CMOS High Speed Synchronous FIFOs 256 x 18-Bit to 1024 x 18-Bit Features Description □ H igh sp eed access times Com 'l: 1 0 ,1 5 ,2 0 ,2 5 ,3 0 ,5 0 ns Mil: 1 5 ,2 0 ,2 5 ,3 0 ,5 0 ns

MC10H131

Abstract: DL122
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual D Type Master-Slave Flip-Flop MC10H131 The MC10H131 is a MECL 10H part which is a functional/pinout duplication of the standard MECL 10K family part, with 100% improvement in clock speed and propagation delay and no increase in power–supply current.

10H131

Contextual Info: MC10H131 Dual D Type Master−Slave Flip−Flop The MC10H131 is a MECL 10H part which is a functional/pinout duplication of the standard MECL 10K family part, with 100% improvement in clock speed and propagation delay and no increase in power−supply current.

mc700p

Abstract: MC791P 51UD
Contextual Info: PLA STIC M R T L MC700P/800P series DUALHI FUP-FIOPS M C 7 9 1 P • M C 8 9 1 P Two J-K flip-flops in a single package. Each flip-flop has a direct clear input in addition to the clocked inputs. C10CKH M W O f t M T IM K j [1] (3) 3 [2) (5) 2 [1) 0) 1

Contextual Info: SY10E131 SYNERG Y 4-BIT D FLIP-FLOP OTlUltlJl SEMICONDUCTOR DESCRIPTION FEATURES • 1100 MHz min. toggle frequency. The SY10E/100E/101E131 is a high speed quad master-slave D-type flip- flop with differential outputs designed for use in new high performance ECL systems. The flip-flops may be individually

10H131

Abstract: MC10H131 MC10H131L MC10H131FN MC10H131P
Contextual Info: MC10H131 Dual D Type Master-Slave Flip-Flop The MC10H131 is a MECL 10H part which is a functional/pinout duplication of the standard MECL 10K family part, with 100% improvement in clock speed and propagation delay and no increase in power–supply current.

MC10H131

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual D Type Master-Slave Flip-Flop MC10H131 The MC10H131 is a MECL 10H part which is a functional/pinout duplication of the standard MECL 10K family part, with 100% improvement in clock speed and propagation delay and no increase in power–supply current.

MC1741C

Abstract: MC1741CP1 MCC1741C MCC830 MCC831 MCC832 MCC930 MCC931
Contextual Info: LINEAR INTEGRATED CIRCUIT CHIPS G E N E R A L D E S C R IP T IO N M o to r o la n o w o ffe rs a ve ry b ro a d se le c tio n o f lin e a r integ rated c ir c u it c h ip s . A m o n g th e ty p e s o f c ir c u its w h ic h c o m p o se th e lin e a r f a m ily th e re are:

"J-K Flip flop"

Abstract: MC1741C MC1741CP1 MCC1741C MCC830 MCC831 MCC832 MCC930 MCC931 MDTL
Contextual Info: LINEAR INTEGRATED CIRCUIT CHIPS G E N E R A L D E S C R IP T IO N M o to r o la n o w o ffe rs a ve ry b ro a d se le c tio n o f lin e a r integ rated c ir c u it c h ip s . A m o n g th e ty p e s o f c ir c u its w h ic h c o m p o se th e lin e a r f a m ily th e re are:

MCC1806

Abstract: MDTL 5SD4 30 mcc862 MC1741C MC1741CP1 MCC1741C MCC830 MCC831 MCC832
Contextual Info: LINEAR INTEGRATED CIRCUIT CHIPS G E N E R A L D E S C R IP T IO N M o to r o la n o w o ffe rs a ve ry b ro a d se le c tio n o f lin e a r integ rated c ir c u it c h ip s . A m o n g th e ty p e s o f c ir c u its w h ic h c o m p o se th e lin e a r f a m ily th e re are:

MCC1813

Abstract: MCC1803 mcc950 MDTL MC1741C MC1741CP1 MCC1741C MCC830 MCC831 MCC832
Contextual Info: LINEAR INTEGRATED CIRCU IT CHIPS G E N E R A L D E S C R IP T IO N M o to r o la n o w o ffe rs a ve ry b ro a d se le c tio n o f lin e a r integ rated c ir c u it c h ip s . A m o n g th e ty p e s o f c ir c u its w h ic h c o m p o se th e lin e a r f a m ily th e re are:

mcc862

Abstract: MDTL MC1741C MC1741CP1 MCC1741C MCC830 MCC831 MCC832 MCC930 MCC931
Contextual Info: LINEAR INTEGRATED CIRCUIT CHIPS G E N E R A L D E S C R IP T IO N M o to r o la n o w o ffe rs a ve ry b ro a d se le c tio n o f lin e a r integ rated c ir c u it c h ip s . A m o n g th e ty p e s o f c ir c u its w h ic h c o m p o se th e lin e a r f a m ily th e re are: