CLOCK MA 1042 Search Results

1188H

Abstract: ESD 138C 10A1H 1136h 138f bc 148b D4D12 K1V 40 N m30 smd odl 1361
Contextual Info: 4: 56 AM CRSU 4x2488 Telecom Standard Product Data Sheet Released da y, 14 Oc to be r, 20 03 02 :2 PM5395 yI nc on Tu es CRSU™ 4x2488 Data Sheet Released Issue 5: December, 2002 lo ad ed by Am r Ma ns ou ro fS ilic on Ex pe rt Te cn ol og Quad Clock Recovery and Synthesis

SSOP20

Contextual Info: ZADCS1082/1042/1022 10-Bit, 250ksps, Serial Output ADC Family Datasheet Description Features • Single Supply Operation: + 2.7V … + 5.25V  Family approach providing 2 / 4 / 8-Channel Single-Ended or 1 / 2 / 4-Channel Differential Inputs  Up to 250ksps Conversion Rate

SSOP20

Contextual Info: ZADCS1082/1042/1022 10-Bit, 250ksps, Serial Output ADC Family Datasheet Features Description • Single Supply Operation: + 2.7V … + 5.25V · Family approach providing 2 / 4 / 8-Channel Single-Ended or 1 / 2 / 4-Channel Differential Inputs · Up to 250ksps Conversion Rate

SSOP20

Contextual Info: ZADCS1082/1042/1022 10-Bit, 250ksps, Serial Output ADC Family Datasheet Features Description • Single Supply Operation: + 2.7V … + 5.25V  Family approach providing 2 / 4 / 8-Channel Single-Ended or 1 / 2 / 4-Channel Differential Inputs  Up to 250ksps Conversion Rate

74ABT374

Abstract: 74ABT574A 74ABT574AD 74ABT574ADB 74ABT574AN
Contextual Info: INTEGRATED CIRCUITS 74ABT574A Octal D-type flip-flop 3-State Product specification 1995 May 22 IC23 Data Handbook Philips Semiconductors PHILIPS PHILIPS 7 1 1 0 0 2 b 00=10420 72b Philips Semiconductors Product specification Octal D-type flip-flop (3-State)

ZADCS1282

Abstract: microcontroller schematic
Contextual Info: Data Sheet Rev. 2.0 / October 2011 ZADCS1082/1042/1022 10-Bit, 250ksps, ADC Family ZADCS1082/1042/1022 10-Bit, 250ksps, ADC Family Brief Description Benefits The ZMDI ZADCS1082/ZADCS1042/ZADCS1022 are 10-Bit low power analog-to-digital A/D converters with up to 250ksps conversion rate.

Contextual Info: ZADCS1082/1042/1022 10-Bit, 250ksps, Serial Output ADC Family Datasheet Features Description • Single Supply Operation: + 2.7V … + 5.25V · Family approach providing 2 / 4 / 8-Channel Single-Ended or 1 / 2 / 4-Channel Differential Inputs · Up to 250ksps Conversion Rate

sac 1630

Abstract: SAC 1630 L
Contextual Info: FUJITSU MICROELECTRONICS 3?4=i7b2 aooasiB ñ E3E D BIPOLAR RANDOMS ACCES^MEMORW F U J IT S U M B M 1 0 4 2 3 L L -6 October 1987 Edition 2.0 o% 1024-BIT BIPOLAR ECL RANDOM ACCESS MEMORY The Fujitsu MBM 10423LL is fu lly decoded 1024-bit ECL read/write random

Contextual Info: HITACHI/ LOGIC/ARRAYS/ IEM 4 ^ 5 0 3 IE 92D - HD7 4 HC174 # DOlDWai 3 10421 T-46-07-1Û D Hex D-type Flip-Flops (with Clear) This device contains 6 master-slave flip-flops with a common • PIN ARRANGEMENT clock and common dear. Data on the D input having the

ls7474

Abstract: ic ls7474 dot matrix lcd sed 1503 EEG Block diagram eeg circuit examples ls7474 ttl SED1500series KKZ 09 8255-2 SED1502
Contextual Info: 09-JAN-E002 14:08 02- it 1- UON:EPSON EUROPE ELECTR. 49 S9 14 5117 7 ; 1 6:23 ;W - z l 'J 'J t E D g IS ìÉ S J AN:419 EEG S. 001^03E 1042 5 8 7 5 6 2 4 1/ MF016-01 SUWA SEIKOSHA O - t o K u dc, o technical manual SED1500series DOT M ATRIX LCD DRIVER

EU-002B

Abstract: 162G0 KS0066 EU-002 7 segment display 5621 lcd w16
Contextual Info: EXAMINED BY : FILE NO . EMERGING DISPLAY APPROVED BY: TECHNOLOGIES CORPORATION ISSUE : SEP.07,2005 TOTAL PAGE : VERSION : CUSTOMER ACCEPTANCE CAS-10420 8 1 SPECIFICATIONS MODEL : 162G0 W HITE LED TYPES (RoHS) FOR MESSRS : CUSTOMER'S APPROVAL : _

Contextual Info: Enpirion Power Datasheet ER2120QI 2A Synchronous Buck Regulator with Integrated MOSFETs DS-1042 Datasheet The Altera® Enpirion® ER2120QI is a synchronous buck controller with internal MOSFETs packaged in a small 4mmx4mm QFN package. The ER2120QI can support a

MA1567

Abstract: S 1854 SDH 209 2272 DECODER HD-SDI over sdh linear handbook LVDS fin 1002 tms 1944 tms 1944 an 22 GR-253-CORE
Contextual Info: 4. DC and Switching Characteristics SIIGX51006-4.6 Operating Conditions Stratix II GX devices are offered in both commercial and industrial grades. Industrial devices are offered in -4 speed grade and commercial devices are offered in -3 fastest , -4, and -5 speed grades.

EP2S15

Abstract: EP2S180 EP2S30 EP2S60 EP2S90 SSTL-18 Pin Out For EP2S15
Contextual Info: 5. DC & Switching Characteristics SII51005-4.4 Operating Conditions Stratix II devices are offered in both commercial and industrial grades. Industrial devices are offered in -4 speed grades and commercial devices are offered in -3 fastest , -4, -5 speed grades.

DIN 962

Abstract: HD-SDI serializer
Contextual Info: 4. DC and Switching Characteristics SIIGX51006-4.5 Operating Conditions Stratix II GX devices are offered in both commercial and industrial grades. Industrial devices are offered in -4 speed grade and commercial devices are offered in -3 fastest , -4, and -5 speed grades.

TL 2272 DECODER

Abstract: PRBS23 PRBS31 tl 3042 MA1567
Contextual Info: 4. DC and Switching Characteristics SIIGX51006-4.4 Operating Conditions Stratix II GX devices are offered in both commercial and industrial grades. Industrial devices are offered in -4 speed grade and commercial devices are offered in -3 fastest , -4, and -5 speed grades.

336 16k 030

Abstract: LVDS fin 1002 Altera Quartus II v.11.0
Contextual Info: 5. DC & Switching Characteristics SII51005-4.5 Operating Conditions Stratix II devices are offered in both commercial and industrial grades. Industrial devices are offered in -4 speed grades and commercial devices are offered in -3 fastest , -4, -5 speed grades.

6A91

Contextual Info: Section I. Stratix II GX Device Data Sheet This section provides designers with the data sheet specifications for Stratix II GX devices. They contain feature definitions of the transceivers, internal architecture, configuration and JTAG boundaryscan testing information, DC operating conditions, AC timing

8th class date sheet 2012

Abstract: date sheet 8th class 2012 2322 640 5 bst 1046 DN 2530 ITS DRIVER CIRCUIT vhdl code for pn sequence generator MA1567
Contextual Info: Section I. Stratix II GX Device Data Sheet This section provides designers with the data sheet specifications for Stratix II GX devices. They contain feature definitions of the transceivers, internal architecture, configuration, and JTAG boundary-scan testing information, DC operating conditions, AC timing

EP2S60F

Abstract: OV 5642 27631 VHDL fpga stratix II ep2s180
Contextual Info: Section I. Stratix II Device Family Data Sheet This section provides the data sheet specifications for Stratix II devices. This section contains feature definitions of the internal architecture, configuration and JTAG boundary-scan testing information, DC

transistor gx 734

Abstract: HD-SDI serializer 16 bit parallel GX 6107
Contextual Info: Section I. Stratix II GX Device Data Sheet This section provides designers with the data sheet specifications for Stratix II GX devices. They contain feature definitions of the transceivers, internal architecture, configuration and JTAG boundaryscan testing information, DC operating conditions, AC timing

HD-SDI over sdh

Abstract: uc 3884 b verilog code of prbs pattern generator S 1854 SMPTE-424 2206 CP 2262 encoder Programmable PLL Clock Generator SDH 209 toggle switches 2041 BY
Contextual Info: Stratix II GX Device Handbook, Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com SIIGX5V1-4.4 Copyright 2009 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and

verilog code of prbs pattern generator

Abstract: transistor gx 734 EP2SGX130
Contextual Info: Section I. Stratix II GX Device Data Sheet This section provides designers with the data sheet specifications for Stratix II GX devices. They contain feature definitions of the transceivers, internal architecture, configuration, and JTAG boundary-scan testing information, DC operating conditions, AC timing

free verilog code of prbs pattern generator

Contextual Info: Section I. Stratix II GX Device Data Sheet This section provides designers with the data sheet specifications for Stratix II GX devices. They contain feature definitions of the transceivers, internal architecture, configuration, and JTAG boundary-scan testing information, DC operating conditions, AC timing