Silabs
Abstract: AN201 CEX5 write c8051f310 interfacing through SPI interface CIP-51 TQFP-48 C8051F361 C8051Fxxx C8051F32 P32238
Contextual Info: C8051F360/1/2/3/4/5/6/7/8/9 Mixed Signal ISP Flash MCU Family ‘F360/1/2/6/7/8/9 only Two Comparators • • • - Programmable hysteresis and response time Configurable as interrupt or reset source Low current (0.4 µA) intrusive in-system debug (no emulator required)
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c8051f360/1/2/3/4/5/6/7/8/9f360/1/2/6/7/8/9silabsan201+8cex5write c8051f310 interfacing through spi interfacecip-51tqfp-48c8051f361c8051fxxxc8051f32p32238
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ECSS-E-50-12A
Abstract: ECSS-E-50-12 SpaceWire
Contextual Info: SpaceWire Codec with RMAP GRSPW / GRSPW-FT CompanionCore Data Sheet Features Description • Full implementation of SpaceWire standard ECSS-E-50-12A • Protocol ID extension ECSS-E-50-11 • RMAP protocol ECSS-E-50-11 • AMBA AHB back-end with DMA • Descriptor-based autonomous multi-packet
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CYGNAL c8051f124
Abstract: c8051f124 interface with 64k SRAM codes C8051F124 DS008 C8051F120DK 100-PIN RD2003 MCS51 programming adapter
Contextual Info: C8051F120/1/2/3 C8051F124/5/6/7 Preliminary High-Speed Mixed-Signal ISP FLASH MCU ANALOG PERIPHERALS - SAR ADC • 12-Bit C8051F120/1/4/5 • 10-Bit (C8051F122/3/6/7) • ± 1 LSB INL • Programmable Throughput up to 100 ksps • Up to 8 External Inputs; Programmable as Single-Ended or
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c8051f120/1/2/3c8051f124/5/6/712-bitc8051f120/1/4/5+1310-bitc8051f122/3/6/7b-100cip-51mcs-51cygnal c8051f124c8051f124 interface with 64k sram codesc8051f124ds008c8051f120dk100-pinrd2003mcs51 programming adapter
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CIP-51
Abstract: IR 126 D 24 c8051F120 UART0 sample program C8051F132
Contextual Info: High Speed 8051 µC Core - Pipelined Instruction Architecture; Executes 70% of - Instruction Set in 1 or 2 System Clocks 100 MIPS or 50 MIPS Throughput with On-chip PLL 2-cycle 16 x 16 MAC Engine C8051F120/1/2/3 and C8051F130/1/2/3 Only Memory - 8448 Bytes Internal Data RAM (8k + 256)
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c8051f120/1/2/3c8051f130/1/2/31024-byte100tqfp+664tqfpc8051f120/1/2/3/4/5/6/7cip-51ir 126 d 24c8051f120 uart0 sample programc8051f132
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c8051f360
Abstract: Silabs C8051F368 4580 REN
Contextual Info: C8051F360/1/2/3/4/5/6/7/8/9 Mixed Signal ISP Flash MCU Family ‘F360/1/2/6/7/8/9 only Two Comparators • • • - Programmable hysteresis and response time Configurable as interrupt or reset source Low current (TBD µA) intrusive in-system debug (no emulator required)
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c8051f360/1/2/3/4/5/6/7/8/910-bitf360/1/2/6/7/8/9f360/1/2/3/4/5/6/7+6f368/91024-bytec8051f360silabsc8051f3684580 ren
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C8051F410-GQ
Abstract: C8051F410 crystal oscillators used in pcb an10216-01 i2c C8051F412-GQ 32-PIN C8051F411 C8051F412 C8051F413 CIP-51
Contextual Info: C8051F410/1/2/3 2.0 V, 32/16 kB Flash, smaRTClock, 12-bit ADC MCU Analog Peripherals - 12-Bit ADC ±1 LSB INL; no missing codes Programmable throughput up to 200 ksps Up to 24 external inputs Data dependent windowed interrupt generator Built-in temperature sensor ±3 °C
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c8051f410/1/2/312-bitc8051f410-gqc8051f410+8crystal oscillators used in pcban10216-01 i2cc8051f412-gq32-pinc8051f411c8051f412c8051f413cip-51
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verilog code for johnson counter
Abstract: 2100 1BZ Q0011 Q1100 16HF80 CLKDIV10 B1111 1650 LD A00000000 ps138
Contextual Info: APPLICATION NOTE CPLDs Verilog models of commonly used digital functions for targeting Philips CPLDs Preliminary Programmable Logic Software 1997 May 22 Philips Semiconductors Preliminary Verilog models of commonly used digital functions CPLDs INTRODUCTION
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888-coregverilog code for johnson counter2100 1bzq0011+7q110016hf80clkdiv10b11111650 lda00000000ps138
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leon3
Abstract: RTAX2000 LEON3FT STK4050II vhdl code CRC ECSS-E-ST-50-11C ahb fsm KEY Component for MIL-STD-1553 IP Core for FPGA APB VHDL code AMBA ahb bus protocol
Contextual Info: SpaceWire CODEC with RMAP GRSPW / GRSPW-FT CompanionCore Data Sheet GAISLER Features Description • Full implementation of SpaceWire standard ECSS-E-ST-50-12C • Protocol ID extension ECSS-E-ST-50-11C • RMAP protocol ECSS-E-ST-50-11C • AMBA AHB back-end with DMA
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ecss-e-st-50-12cecss-e-st-50-11cleon3rtax2000+7leon3ftstk4050iivhdl code crcahb fsmkey component for mil-std-1553 ip core for fpgaapb vhdl codeamba ahb bus protocol
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VHDL code for traffic light controller
Abstract: vhdl code for 4 bit barrel shifter vhdl code for 8 bit barrel shifter vhdl code for 16 BIT BINARY DIVIDER vhdl code for 16 bit barrel shifter vhdl code for demultiplexer Code vhdl traffic light schematic counter traffic light vhdl code for a 9 bit parity generator vhdl code for 4-bit counter
Contextual Info: APPLICATION NOTE CPLDs VHDL models of commonly used digital functions for targeting Philips CPLDs Preliminary Programmable Logic Software 1996 Sep 30 Philips Semiconductors Preliminary VHDL models of commonly used digital functions CPLDs INTRODUCTION This application note provides VHDL models,test fixtures, and simulation results for many commonly used digital
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vhdl code for traffic light controllervhdl code for 4 bit barrel shiftervhdl code for 8 bit barrel shiftervhdl code for 16 bit binary divider+6vhdl code for 16 bit barrel shiftervhdl code for demultiplexercode vhdl traffic lightschematic counter traffic lightvhdl code for a 9 bit parity generatorvhdl code for 4-bit counter
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7-DS12
Abstract: 100-PIN 8051 c programming examples C8051F120
Contextual Info: C8051F120/1/2/3/4/5/6/7 High-Speed Mixed-Signal ISP FLASH MCU Family ANALOG PERIPHERALS - SAR ADC • 12-Bit C8051F120/1/4/5 • 10-Bit (C8051F122/3/6/7) • ± 1 LSB INL • Programmable Throughput up to 100 ksps • Up to 8 External Inputs; Programmable as Single-Ended or
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C8051F120DK
Abstract: c8051f124 interface with 64k SRAM codes CYGNAL motorola better program c8051F120 UART0 sample program c8051F120 UART0 transmit and receive program C8051F122
Contextual Info: C8051F120/1/2/3 C8051F124/5/6/7 Preliminary High-Speed Mixed-Signal ISP FLASH MCU ANALOG PERIPHERALS - SAR ADC • 12-Bit C8051F120/1/4/5 • 10-Bit (C8051F122/3/6/7) • ± 1 LSB INL • Programmable Throughput up to 100 ksps • Up to 8 External Inputs; Programmable as Single-Ended or
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c8051f120/1/2/3c8051f124/5/6/712-bitc8051f120/1/4/5+1310-bitc8051f122/3/6/7b-100cip-51mcs-51ds008-0c8051f120dkc8051f124 interface with 64k sram codescygnalmotorola better programc8051f120 uart0 sample programc8051f120 uart0 transmit and receive programc8051f122
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c8051F120 UART0 sample program
Abstract: c8051F120 UART0 transmit and receive program C8051F130 Target Board C8051F120 CIP-51
Contextual Info: C8051F120/1/2/3/4/5/6/7 C8051F130/1/2/3 Mixed Signal ISP Flash MCU Family High Speed 8051 µC Core - Pipelined Instruction Architecture; Executes 70% of Analog Peripherals - 10 or 12-bit SAR ADC • ± 1 LSB INL • Programmable Throughput up to 100 ksps • Up to 8 External Inputs; Programmable as Single-
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C8051F360
Abstract: Silabs CIP-51 TQFP-48 79ma f36012 CPS20
Contextual Info: C8051F360/1/2/3/4/5/6/7/8/9 Mixed Signal ISP Flash MCU Family Analog Peripherals - 10-Bit ADC ‘F360/1/2/6/7/8/9 only • Up to 200 ksps • Up to 21 external single-ended or differential inputs • VREF from internal VREF, external pin or VDD • Internal or external start of conversion source
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c8051F120 UART0 transmit and receive program
Abstract: c8051F120 UART0 sample program MV1100 C8051F06x C8051F130 Target Board CIP-51 AIN24 1943 5200
Contextual Info: C8051F120/1/2/3/4/5/6/7 C8051F130/1/2/3 Mixed Signal ISP Flash MCU Family High Speed 8051 µC Core - Pipelined Instruction Architecture; Executes 70% of Analog Peripherals - 10 or 12-bit SAR ADC • ± 1 LSB INL • Programmable Throughput up to 100 ksps • Up to 8 External Inputs; Programmable as Single-
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