CLB Search Results

UL-1500

Abstract: ISO8846
Contextual Info: CLB-Series Pushbutton Thermal Circuit Protector Rating: 3 to 40A, 125-250VAC, 32VDC Approvals: UL, CUL, TUV, CE UL1500/ISO8846 for ignition protection/marine Dielectric Strength: 2500 VAC/ 1 minute Interrupting capacity: 2500 amps Resettable overload capacity:

Contextual Info: My Account C hange Tyco Electronics Se a rch by Ke yword or Pa rt # Products Documentation Resources My Account Customer Support Home > Products > By Type > Relays > Product Feature Selector > Product Details CLB-51-70120 Product Details Time Delay Relays

Contextual Info: APPLICATION SPECIFIC CAPACITORS MINIATURE CERAMIC CAPACITORS CLB Series FEATURES The CLB Series of capacitors has been developed to meet the demand for a high reliability capacitor with the ability to withstand high voltages in microwave applications. They are a result of the

RAM32M

Abstract: RAM64X1D SRLC32E RAM128X1D RAM256X1S SRL32 RAM64M ROM64x1 XC6VLX75T ROM256x1
Contextual Info: Virtex-6 FPGA Configurable Logic Block User Guide Virtex-6 FPGA CLB [optional] UG364 v1.1 September 16, 2009 [optional] Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development

DPRAM

Abstract: XCV600E IMA-32 XC4085XLA
Contextual Info: IMA-32 Inverse Multiplexer for ATM November 15, 1999 Product Specification AllianceCORE Facts Core Specifics 4000XLA 4085XLA09BG352C CLBs/CLB Slices 3136 Clock IOBs 3 IOBs 258 Performance MHz 50 Xilinx Tools M1.5i or later Special Features SelectRAM Supported Family

XILINX vhdl code REED SOLOMON

Abstract: EMEC
Contextual Info: Allianc XF-R8ENC Reed Solomon Encoder N ovem ber 9, 1998 Product Specification AllianceCORE Facts Core Specifics Device Family CLBs Used System Clock fmax Maria Aguilar, Project Coordinator 1819 S. Dobson Rd., Suite 203 Mesa, AZ 85202 Phone: +1 888-360-9044 USA

EL7144C

Abstract: EL7144CN
Contextual Info: WON PERFORMANCE ANALOG INTEGRATED ClBCJtTS Features • Logic and input • 3V and 5V Input compatible • Clocking speeds up to 10 MHz • 20 ns Switching/delay time • 4A Peak drive • Isolated drains • Low output impedance—2.5il • Low quiescent current—5 mA

xilinx MTBF

Abstract: XC9500 XC4000 XC4000E XC5200 XC3042-70 XC4005E test board
Contextual Info: Metastability Recovery in Xilinx FPGAs Whenever a clocked flip-flop syn- Figure: Mean Time Between Failure for various IOB and CLB flip-flop outputs when synchronizing a 1 MHz asynchronous input with a 10 MHz clock. 30 chronizes an asynchronous input, there is

xilinx pq-160

Abstract: xcs20 316 SO8 XC95 XC95144XL XC95144XL prom XC1700 XC4000XV XC40110XV XC40150XV
Contextual Info: Device Selection Guide 384 600 864 1,176 1,536 2,400 3,456 4,704 6,144 1,536 2,400 3,456 4,704 6,144 9,600 13,824 18,816 24,576 180 196 260 284 324 404 500 510 510 see note 2 Total CLBs Total CLBs Total Flip-Flops Max. I/O Package 196 400 576 1,024 1,024

cn/A/U 237 BG

Contextual Info: PT7M6418 -6450CL/CH /NL/BL/NLL/CLB | | |

200 w amp

Abstract: UL1500
Contextual Info: CLB-Series THERMAL CIRCUIT PROTECTORS Rating: 3 to 60A, 125-250VAC, 32VDC Approvals: UL, CUL, CSA, TUV, CE UL1500/ISO8846 for ignition protection/marine Dielectric Strength: 2500 VAC/1 minute Interrupting capacity: 2500 amps @ 32 VDC Insulation Resistance:

Contextual Info: Continental Device India Limited An ISO/TS 16949, ISO 9001 and ISO 14001 Certified Company SILICON PLANAR EPITAXIAL TRANSISTORS CLB764 PNP CLD863 NPN TO-92 Plastic Package E CB Voltage Regulator, Relay Lamp Driver Electrical Equipment Applications ABSOLUTE MAXIMUM RATINGS Ta=25ºC

Contextual Info: CHAPTER 8. 8.1 COMMANDS AND RESPONSES TYPES OF COMMANDS AND RESPONSES Commands are classified into five groups: setup command.-, operation commands, statistic commands, CLB switch commands, and special commands. Table 8-1 lists the functions of each group and the commands that belong

KM23C4001

Contextual Info: SAM SUN G E L E C T R O N I C S INC 42E El 7 clb m M B oonm o 5 QSNGK KM23C4001 CMOS MASK ROM 4M-Bit 512Kx8 CMOS MASK ROM V ‘ ! ' 1 3 - 1 3 - / 5 FEATURES GENERAL DESCRIPTION • • • • The KM23C4001 is a fully static mask programmable ROM organized 524,288x8 bit. It is fabricated using

linked state machines

Abstract: X3215 XAPP007 XAPP007O XAPP007V XC3000 XC3020 8 shift register by using D flip-flop
Contextual Info: Boundary-Scan Emulator for XC3000  XAPP 007.001 Application Note By BERNIE NEW Summary CLBs are used to emulate IEEE1149.1 Boundary Scan. The LCA device is configured to test the board interconnect, and then reconfigured for operation. Specifications Tests Supported

GDB56

Abstract: A-18
Contextual Info: Appendix A Programming Support A.1 Standard ANSI Header Files Each function provided in the ANSI C library lib56c[xyl].clb is declared with the appropriate prototype in a header, whose contents are made available by the #include preprocessing directive. In addition to function prototypes, the header also defines all

sis 968

Abstract: vhdl code for complex multiplication and addition 200E 300E 400E 600E PCI33 3 bit right left shift register verilog vHDL prog
Contextual Info: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-2 v2.3 November 9, 2001 Preliminary Product Specification Architectural Description Virtex-E Array The Virtex-E user-programmable gate array, shown in Figure 1, comprises two major configurable elements: configurable logic blocks (CLBs) and input/output blocks (IOBs).

Contextual Info: 8 5 6 7 4 1. 2. 3. D 4. 5. 6. 7. 8. 2 3 NOTES: ECN # DESIGN: Lens mounts the Litepipe securely to display panel providing 180 viewing angle MOUNTING: Panel mounting hole .250 6.35mm on 3/8" centers PANEL THICKNESS: For CLB 300 and SQB 400: 1/32" to 1/4".

Contextual Info: ELECTRICAL SPECIFICATIONS MECHANICAL SPECIFICATIONS FREQUENCY RANGE GHz ! IMPEDANCE (NOMINAL)! VSW Ri INPUTi □U TPU T i INSERTION LOSS (clB)i AM PLITUDE BALANCE (MAX)! PHASE BALANCE (MAX)! 3,400-4,200 50 OHMS T YP/1.20il MAX CONNECTORS! CONNECTOR PINS!

code 4 bit LFSR

Abstract: LFSR XAPP052 XNOR 74 8 bit LFSR applications 74 XOR GATE XAPP210 LFSR lookup table code 24 bit LFSR LFSR COUNTER
Contextual Info: Application Note: Virtex Series R XAPP210 v1.1 March 14, 2000 Linear Feedback Shift Registers in Virtex Devices Author: Maria George and Peter Alfke Summary This application note describes the implementation of Linear Feedback Shift Registers (LFSR) using the Virtex SRL macro. One half of a CLB can be configured to implement a 15-bit LFSR,

Contextual Info: Quality Products. Service Excellence. Cable Lacing Bar CLB Series The Cable Lacing Bar CLB reduces strain on cables connected to a patch panel or device. Available in three depths the CLB is sold in packs of ten (10) to reduce packaging. Features Constructed of 0.25" steel rod.

K1339

Contextual Info: APPLICATION SPECIFIC CAPACITORS MINIATURE CERAMIC CAPACITORS CLB Series FEATURES The CLB Series of capacitors has been developed to meet the demand for a high reliability capacitor with the ability to withstand high voltages in microwave applications. They are a result of the

CLD-2251A

Abstract: 2251A 2251B
Contextual Info: CHANGLI OPTOELECTRONIC CLB-2251Series CLD-2251A CLD-2251B Remark : 1. represents Internal Circuit Feature: A C E Common Cathode, B D F Common Anode. 2. represents LED Emitted Color. 3. All dimensions are in millimeters inches , tolerance is 0.25mm(0.01 ) unless otherwise noted.

CLB-2514

Abstract: CLB-4615B 4615B clb25 optoelectronic CLB-2514D CLB-4615A
Contextual Info: CHANGLI OPTOELECTRONIC CLB-2514Series CLB-2514C CLB-2514D CLB-4615Series CLB-4615A CLB-4615B Remark : 1. represents Internal Circuit Feature: A C E Common Cathode, B D F Common Anode. 2. represents LED Emitted Color. 3. All dimensions are in millimeters inches , tolerance is 0.25mm(0.01 ) unless otherwise noted.