CHN 345 X Search Results

CHN 345 X

Contextual Info: 4 Megabit 512K x 8 SuperFlash MTP SST37VF040 Prelim inary Specifications FEATURES: • • 2.7-3.6V Read Operation Fast Programming Operation Superior Reliability - - Features Electrical Erase Endurance: At least 1000 Cycles Greater than 100 years Data Retention

D4710

Abstract: M01F E853 M6G DATASHEET z421 A616 K4170 5A6Y
Contextual Info: E= 70D056='*A616*9F)18*?)G,*H I>G)D/)=*+JJH !"#$%&' )*+,-*./01232*&456/7)8*916/070:);8 <)1=>%?)@0>567*AB?*C62)=*&=652D011)=2 • <Y#BY#$B(P&%$3(5.#(%$ ■ 0%"5'3.##&%4&5"-6&$.5BY# S(70P610>52 ■ F&#%(4%&1.(5"6$5&#P(%:'$#($789$:3 ■ \&%I$2&5'&T$P"Q&42.Q.'.(5$3Y6#.B6&O.51$]!S!F^

CHN 550

Abstract: CHN 545 chn 710 CHN 712 chn 538 CHN 431 CHN 709 CHN 741 chn 738 chn 648 equivalent
Contextual Info: R&S ZNC/ZND Vector Network Analyzers User Manual ;xíÇ2 User Manual Test & Measurement 1173.9557.02 ─ 26 This manual describes the following vector network analyzer types: ● R&S®ZNC3 (2 ports, 9 kHz to 3 GHz, N connectors), order no. 1311.6004K12

16/BES 516 356 Av Z 142

Contextual Info: Table of Contents IN T R O D U C T IO N .1 ORDERING INFO RM ATION . 2 TABLE OF C O N T E N T S . 3 ALPH ABETICAL I N D E X . 5 N U M ER ICA L I N D E X . 7 CA PA BILITIES.9

CHN b42

Abstract: chn 743 pin of chn 743 chn 529 CHN 524 chn 729 CHN 849 CHN 616 CHN 847 RYM 17-18
Contextual Info: ADSP-21065L SHARC DSP Technical Reference Revision 2.0, July 2003 Part Number 82-001903-01 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a Copyright Information 2003 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written consent

DDMA78P

Abstract: ddma78s chn 605 DD-78
Contextual Info: 1 *MA H ig h D ensity D C rim p P r i n t e d C irc u it See page 342) (See page 343) Perfo rm a n ce and M a te ria l S pecific a tio n s M A T E R IA L S A N D F IN IS H E S Standard M ilita ry M aterial Finish M aterial S h e lf S teel pe t A S T M A -6 2 0

2SK2081-01

Abstract: SC-65 T151 FA-MT a2396
Contextual Info: 2SK2081-01 FUJI POWER MOS-FET N-OHANNEL SILICON POWER MOS-FET F A P -IIA S E R IE S • : eatures Outline Drawings • h igh speed switching • Low on-resistance • Mo secondary breakdown • Low driving power • High voltage • Vcs = ±30V Guarantee • Avalanche-proof

Contextual Info: V ishay I n t e r t e chn o l o g y, I nc . Capacitors - High Reliability and Life Expectancy AND TEC I INNOVAT O L OGY HDMKP N HN VISHAY ESTA POWER CAPACITORS O 19 62-2012 Capacitors for Power Electronics Key Benefits • • • • • • High RMS current rating: up to 150 A

CHN 545

Contextual Info: 2SK2081 -01 F U JI PO W ER M O S-FET N-OHANNEL SILICON POWER MOS-FET FAP-IIASERIES • -eatures lOutline Drawings • I- igh speed switching • Low on-resistance • Mo secondary breakdown • Low driving power • High voltage • V Cs= ± 3 0 V Guarantee

Digital Alarm Clock using 8051

Abstract: chn 448 chn 706 CHN 632 CHN 703 RAM 2112 256 word 32.768mhz pin hole thru chn 608 microcontroller 8051 application of alarm clock octal tri state buffer ic
Contextual Info: áç XRT84L38 OCTAL T1/E1/J1 FRAMER FEBRUARY 2004 REV. 1.0.0 GENERAL DESCRIPTION The XRT84L38 is an eight-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framing controller. The XRT84L38 contains an integrated DS1/E1/J1 framer which provides DS1/E1/J1 framing and error accumulation in accordance with ANSI/ITU_T specifications.

CHN G4 136

Abstract: chn7 SA8 357 TR54016 XRT83L38 XRT84L38 XRT84L38IB 7174B 8ch LOW SATURATION DRIVER C1-168
Contextual Info: XRT84L38 OCTAL T1/E1/J1 FRAMER SEPTEMBER 2006 REV. 1.0.1 GENERAL DESCRIPTION The XRT84L38 is an eight-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framing controller. The XRT84L38 contains an integrated DS1/E1/J1 framer which provides DS1/E1/J1 framing and error

CHN G4 124

Abstract: CHN G4 329
Contextual Info: áç XRT84L38 PRELIMINARY OCTAL T1/E1/J1 FRAMER JULY 2003 REV. P1.0.4 GENERAL DESCRIPTION The XRT84L38 is an eight-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framing controller. The XRT84L38 contains an integrated DS1/E1/J1 framer which provides DS1/E1/J1 framing and error accumulation in accordance with ANSI/ITU_T specifications.

rbs 6201 manual

Abstract: rbs 6201 POWER CONSUMPTION chn 452 rbs 6201 specification chn 710 SCR PIN CONFIGURATION CHN 035 RBS 6201 INFORMATION SDH 209 rbs 6201 LOP 36 AF
Contextual Info: XRT86L38 PRELIMINARY PRELIMINARY OCTAL T1/E1/J1 FRAMER/LIU COMBO NOVEMBER 2003 REV. P1.0.4 GENERAL DESCRIPTION The XRT86L38 is an eight-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution. The XRT86L38 contains an integrated DS1/

SC222

Abstract: CHN 617 CHN 208
Contextual Info: 155 Mbps ATM SAR CONTROLLER WITH ABR SUPPORT FOR PCI-BASED NETWORKING APPLICATIONS PRELIMINARY INFORMATION IDT77222 Integrated Device Technology, Inc. KEY FEATURES • Full-duplex Segmentation and Reassembly SAR at 155 Mbps "wire-speed" (310 Mbps aggregate speed).

Contextual Info: 155 Mbps ATM SAR CONTROLLER WITH ABR SUPPORT FOR PCI-BASED NETWORKING APPLICATIONS PRELIMINARY INFORMATION IDT77252 In te g ra te d D e v i l e T e c h n o lo g y , l i e . KEY FEATURES • Full-duplex Segmentation and Reassembly SAR at 155 Mbps "wire-speed" (310 Mbps aggregate speed).

CHN 530

Abstract: chn 707 hiab chn 445 CHN 455
Contextual Info: :Q§ LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH 3-STATE : jdfr/ Integrated De vice Technology, Inc. FEATURES: IDT74FCT88915TT 55/70/100/133 mance PCs and workstations. One of the outputs is fed back to the PLL at the FEEDBACK input resulting in essentially

CHN 642

Abstract: RG 48/U ER 157 CHN 647 IDT77211 SRA-4
Contextual Info: 155 Mbps ATM SAR CONTROLLER FOR PCI-BASED NETWORKING APPLICATIONS Key Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ PRELIMINARY INFORMATION IDT77211 Descriptions The IDT77211 NICStAR is a member of IDT's family of products for

CHN 642

Abstract: IDT77211
Contextual Info: 155 Mbps ATM SAR CONTROLLER FOR PCI-BASED NETWORKING APPLICATIONS Key Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ IDT77211 Descriptions The IDT77211 NICStAR is a member of IDT's family of products for Asynchronous Transfer Mode ATM networks. The NICStAR performs

SDH 209

Abstract: DMO 565 R SCR PIN CONFIGURATION CHN 035 CHN G4 309 telephone schemes sa8316 dmo 265 CHN G4 329
Contextual Info: xr XRT86VL38 PRELIMINARY OCTAL T1/E1/J1 FRAMER/LIU COMBO MARCH 2005 REV. P1.0.6 GENERAL DESCRIPTION The XRT86VL38 is an eight-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy .

Contextual Info: 155 Mbps ATM SAR CONTROLLER WITH ABR SUPPORT FOR PCI-BASED NETWORKING APPLICATIONS PRELIMINARY INFORMATION IDT77252 Integrated Device Technology, Inc. KEY FEATURES • Full-duplex Segmentation and Reassembly SAR at 155 Mbps "wire-speed" (310 Mbps aggregate speed).

Contextual Info: PRELIMINARY IDT7027S/L HIG H -S P E E D 32K x 16 D U A L -P O R T STATIC RAM FEATURES: Dual chip enables allow for depth expansion without external logic IDT7027 easily expands data bus width to 32 bits or more using the Master/Slave select when cascading

TP4057

Abstract: 4057D TLO 81 SRA3
Contextual Info: 155 Mbps ATM SAR CO N T R O L L E R P R E LI M IN A R Y WITH ABR S U P P O R T FOR PCI-BASED N E T W O R K I N G AP PLI CA TI ON S INFORM ATIO N IDT77252 KEY FE A TU R ES • F u ll-d u p le x S e g m e n ta tio n an d R e a s s e m b ly S A R at 155 M b p s "w ire -s p e e d " (3 1 0 M b p s a g g re g a te s p e e d ).

chn 622 st

Abstract: chn 622 V908
Contextual Info: H IG H -S P E E D 3.3V 64K x 8 S Y N C H R O N O U S PIPELINED D U A L - P O R T STATIC RAM PRELIMINARY IDT70 V9089S/L FEATURES: • • True Dual-Ported memory cells which allow simulta­ neous access ot the same memory location • High-speed clock to data access

Contextual Info: H I G H- SPE ED 16K x 16 S Y N C H R O N O U S PI PELI NED D U A L - P O R T STATIC RAM PRELIMINARY IDT709269S/L FEATURES: • • • • • • • True Dual-Ported m em ory cells which allow sim ulta­ neous access ot the sam e m em ory location High-speed clock to data access